In order to support the PSR state of each transcoder, it adds i915_psr_status to sub-directory of each transcoder. v2: Change using of Symbolic permissions 'S_IRUGO' to using of octal permissions '0444' v5: Addressed JJani Nikula's review comments - Remove checking of Gen12 for i915_psr_status. - Add check of HAS_PSR() - Remove meaningless check routine. Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@xxxxxxxxx> Cc: José Roberto de Souza <jose.souza@xxxxxxxxx> Cc: Jani Nikula <jani.nikula@xxxxxxxxx> Cc: Anshuman Gupta <anshuman.gupta@xxxxxxxxx> Reviewed-by: Anshuman Gupta <anshuman.gupta@xxxxxxxxx> --- .../gpu/drm/i915/display/intel_display_debugfs.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c index 2b1708e13cbc..100c4519925e 100644 --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c @@ -2224,6 +2224,16 @@ static int i915_hdcp_sink_capability_show(struct seq_file *m, void *data) } DEFINE_SHOW_ATTRIBUTE(i915_hdcp_sink_capability); +static int i915_psr_status_show(struct seq_file *m, void *data) +{ + struct drm_connector *connector = m->private; + struct intel_dp *intel_dp = + intel_attached_dp(to_intel_connector(connector)); + + return intel_psr_status(m, intel_dp); +} +DEFINE_SHOW_ATTRIBUTE(i915_psr_status); + #define LPSP_CAPABLE(COND) (COND ? seq_puts(m, "LPSP: capable\n") : \ seq_puts(m, "LPSP: incapable\n")) @@ -2399,6 +2409,12 @@ int intel_connector_debugfs_add(struct drm_connector *connector) connector, &i915_psr_sink_status_fops); } + if (HAS_PSR(dev_priv) && + connector->connector_type == DRM_MODE_CONNECTOR_eDP) { + debugfs_create_file("i915_psr_status", 0444, root, + connector, &i915_psr_status_fops); + } + if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort || connector->connector_type == DRM_MODE_CONNECTOR_HDMIA || connector->connector_type == DRM_MODE_CONNECTOR_HDMIB) { -- 2.30.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx