> -----Original Message----- > From: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Sent: Tuesday, January 19, 2021 1:41 AM > To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx > Cc: mika.kuoppala@xxxxxxxxxxxxxxx; Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>; > Abodunrin, Akeem G <akeem.g.abodunrin@xxxxxxxxx> > Subject: [PATCH 1/5] drm/i915/gt: One more flush for Baytrail clear residuals > > CI reports that Baytail requires one more invalidate after CACHE_MODE for it > to be happy. > > Fixes: ace44e13e577 ("drm/i915/gt: Clear CACHE_MODE prior to clearing > residuals") > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> > Cc: Akeem G Abodunrin <akeem.g.abodunrin@xxxxxxxxx> > --- > drivers/gpu/drm/i915/gt/gen7_renderclear.c | 9 ++++++--- > 1 file changed, 6 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/gen7_renderclear.c > b/drivers/gpu/drm/i915/gt/gen7_renderclear.c > index 39478712769f..8551e6de50e8 100644 > --- a/drivers/gpu/drm/i915/gt/gen7_renderclear.c > +++ b/drivers/gpu/drm/i915/gt/gen7_renderclear.c > @@ -353,19 +353,21 @@ static void gen7_emit_pipeline_flush(struct > batch_chunk *batch) > > static void gen7_emit_pipeline_invalidate(struct batch_chunk *batch) { > - u32 *cs = batch_alloc_items(batch, 0, 8); > + u32 *cs = batch_alloc_items(batch, 0, 10); > > /* ivb: Stall before STATE_CACHE_INVALIDATE */ > - *cs++ = GFX_OP_PIPE_CONTROL(4); > + *cs++ = GFX_OP_PIPE_CONTROL(5); > *cs++ = PIPE_CONTROL_STALL_AT_SCOREBOARD | > PIPE_CONTROL_CS_STALL; > *cs++ = 0; > *cs++ = 0; > + *cs++ = 0; > > - *cs++ = GFX_OP_PIPE_CONTROL(4); > + *cs++ = GFX_OP_PIPE_CONTROL(5); > *cs++ = PIPE_CONTROL_STATE_CACHE_INVALIDATE; > *cs++ = 0; > *cs++ = 0; > + *cs++ = 0; > > batch_advance(batch, cs); > } > @@ -397,6 +399,7 @@ static void emit_batch(struct i915_vma * const vma, > batch_add(&cmds, 0xffff0000); > batch_add(&cmds, i915_mmio_reg_offset(CACHE_MODE_1)); > batch_add(&cmds, 0xffff0000 | > PIXEL_SUBSPAN_COLLECT_OPT_DISABLE); > + gen7_emit_pipeline_invalidate(&cmds); > gen7_emit_pipeline_flush(&cmds); > > /* Switch to the media pipeline and our base address */ > -- > 2.20.1 Reviewed-by: Akeem G Abodunrin <akeem.g.abodunrin@xxxxxxxxx> Thank you! ~Akeem _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx