On Wed, Jan 13, 2021 at 05:37:59AM -0800, José Roberto de Souza wrote:
> DG1 is missing those two WA so instead of copy and paste it to the DG1
> function, here calling the function that implements it.
>
> While at it also renaming tgl_init_clock_gating to
> gen12lp_init_clock_gating as it is also used by DG1, RKL and ADL-S.
>
> Cc: Matt Roper <matthew.d.roper@xxxxxxxxx>
> Signed-off-by: José Roberto de Souza <jose.souza@xxxxxxxxx>
Reviewed-by: Matt Roper <matthew.d.roper@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 12 +++++++-----
> 1 file changed, 7 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index bbc73df7f753..992fce8b8d13 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -7103,24 +7103,26 @@ static void icl_init_clock_gating(struct drm_i915_private *dev_priv)
> 0, CNL_DELAY_PMRSP);
> }
>
> -static void tgl_init_clock_gating(struct drm_i915_private *dev_priv)
> +static void gen12lp_init_clock_gating(struct drm_i915_private *dev_priv)
> {
> - /* Wa_1409120013:tgl */
> + /* Wa_1409120013:tgl,rkl,adl_s,dg1 */
> intel_uncore_write(&dev_priv->uncore, ILK_DPFC_CHICKEN,
> - ILK_DPFC_CHICKEN_COMP_DUMMY_PIXEL);
> + ILK_DPFC_CHICKEN_COMP_DUMMY_PIXEL);
>
> /* Wa_1409825376:tgl (pre-prod)*/
> if (IS_TGL_DISP_REVID(dev_priv, TGL_REVID_A0, TGL_REVID_B1))
> intel_uncore_write(&dev_priv->uncore, GEN9_CLKGATE_DIS_3, intel_uncore_read(&dev_priv->uncore, GEN9_CLKGATE_DIS_3) |
> TGL_VRH_GATING_DIS);
>
> - /* Wa_14011059788:tgl */
> + /* Wa_14011059788:tgl,rkl,adl_s,dg1 */
> intel_uncore_rmw(&dev_priv->uncore, GEN10_DFR_RATIO_EN_AND_CHICKEN,
> 0, DFR_DISABLE);
> }
>
> static void dg1_init_clock_gating(struct drm_i915_private *dev_priv)
> {
> + gen12lp_init_clock_gating(dev_priv);
> +
> /* Wa_1409836686:dg1[a0] */
> if (IS_DG1_REVID(dev_priv, DG1_REVID_A0, DG1_REVID_A0))
> intel_uncore_write(&dev_priv->uncore, GEN9_CLKGATE_DIS_3, intel_uncore_read(&dev_priv->uncore, GEN9_CLKGATE_DIS_3) |
> @@ -7583,7 +7585,7 @@ void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv)
> if (IS_DG1(dev_priv))
> dev_priv->display.init_clock_gating = dg1_init_clock_gating;
> else if (IS_GEN(dev_priv, 12))
> - dev_priv->display.init_clock_gating = tgl_init_clock_gating;
> + dev_priv->display.init_clock_gating = gen12lp_init_clock_gating;
> else if (IS_GEN(dev_priv, 11))
> dev_priv->display.init_clock_gating = icl_init_clock_gating;
> else if (IS_CANNONLAKE(dev_priv))
> --
> 2.30.0
>
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
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