✗ Fi.CI.BAT: failure for VRR/Adaptive Sync Enabling on DP/eDP for TGL+

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Title: Project List - Patchwork
Patch Details
Series:VRR/Adaptive Sync Enabling on DP/eDP for TGL+
URL:https://patchwork.freedesktop.org/series/85831/
State:failure
Details:https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19345/index.html

CI Bug Log - changes from CI_DRM_9603 -> Patchwork_19345

Summary

FAILURE

Serious unknown changes coming with Patchwork_19345 absolutely need to be
verified manually.

If you think the reported changes have nothing to do with the changes
introduced in Patchwork_19345, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.

External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19345/index.html

Possible new issues

Here are the unknown changes that may have been introduced in Patchwork_19345:

IGT changes

Possible regressions

Suppressed

The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.

Known issues

Here are the changes found in Patchwork_19345 that come from known issues:

IGT changes

Issues hit

Possible fixes

{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).

Participating hosts (43 -> 38)

Missing (5): fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-cml-drallion fi-bdw-samus

Build changes

CI-20190529: 20190529
CI_DRM_9603: 4e758db4f1c2fd3dcfa7bf1cd33a0863978f555c @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5957: 2a2b3418f7458dfa1fac255cc5c71603f617690a @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19345: ac9c147c77da7f5d478f76e0e192bb0c3d747ef6 @ git://anongit.freedesktop.org/gfx-ci/linux

== Linux commits ==

ac9c147c77da drm/i915: Fix vblank evasion with vrr
96df6e91917c drm/i915: Fix vblank timestamps with VRR
6a48576a1fa4 drm/i915: Add vrr state dump
6185d7835cbe drm/i915/display: Helpers for VRR vblank min and max start
b857d16e4dd6 drm/i915/display: Add HW state readout for VRR
510a51a72bed drm/i915/display/vrr: Set IGNORE_MSA_PAR state in DP Sink
259a9c3dcc00 drm/i915/display/vrr: Disable VRR in modeset disable path
31bb5d8efd39 drm/i915/display/vrr: Send VRR push to flip the frame
1e53166817ac drm/i915/display/vrr: Configure and enable VRR in modeset enable
5729930e732b drm/i915: Rename VRR_CTL reg fields
0061e69b29f3 drm/i915/display: VRR + DRRS cannot be enabled together
6bea0561c8ab drm/i915/display/dp: Do not enable PSR if VRR is enabled
a07503674c3c drm/i915/display/dp: Compute VRR state in atomic_check
762167321220 drm/i915: Extract intel_crtc_scanlines_since_frame_timestamp()
7caaca7f5a5d drm/i915: Extract intel_mode_vblank_start()
e42f3141b758 drm/i915: Store framestart_delay in dev_priv
be5b431abcca drm/i915/display/dp: Attach and set drm connector VRR property
9d81944ab3b3 drm/i915/display/vrr: Create VRR file and add VRR capability check

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