On Tue, Dec 29, 2020 at 07:22:00PM +0200, Imre Deak wrote: > intel_dp_set_signal_levels() is needed for link training, so move it to > intel_dp_link_training.c. > > Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx> > --- > drivers/gpu/drm/i915/display/intel_dp.c | 18 ------------------ > drivers/gpu/drm/i915/display/intel_dp.h | 3 --- > .../drm/i915/display/intel_dp_link_training.c | 18 ++++++++++++++++++ > .../drm/i915/display/intel_dp_link_training.h | 2 ++ > 4 files changed, 20 insertions(+), 21 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c > index f0e8aaac413c..88a6033d6867 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -5003,24 +5003,6 @@ ivb_cpu_edp_set_signal_levels(struct intel_dp *intel_dp, > intel_de_posting_read(dev_priv, intel_dp->output_reg); > } > > -void intel_dp_set_signal_levels(struct intel_dp *intel_dp, > - const struct intel_crtc_state *crtc_state) > -{ > - struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); > - u8 train_set = intel_dp->train_set[0]; > - > - drm_dbg_kms(&dev_priv->drm, "Using vswing level %d%s\n", > - train_set & DP_TRAIN_VOLTAGE_SWING_MASK, > - train_set & DP_TRAIN_MAX_SWING_REACHED ? " (max)" : ""); > - drm_dbg_kms(&dev_priv->drm, "Using pre-emphasis level %d%s\n", > - (train_set & DP_TRAIN_PRE_EMPHASIS_MASK) >> > - DP_TRAIN_PRE_EMPHASIS_SHIFT, > - train_set & DP_TRAIN_MAX_PRE_EMPHASIS_REACHED ? > - " (max)" : ""); > - > - intel_dp->set_signal_levels(intel_dp, crtc_state); > -} > - > void > intel_dp_program_link_training_pattern(struct intel_dp *intel_dp, > const struct intel_crtc_state *crtc_state, > diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h > index 4280a09fd8fd..4ebda4e43003 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.h > +++ b/drivers/gpu/drm/i915/display/intel_dp.h > @@ -96,9 +96,6 @@ void > intel_dp_program_link_training_pattern(struct intel_dp *intel_dp, > const struct intel_crtc_state *crtc_state, > u8 dp_train_pat); > -void > -intel_dp_set_signal_levels(struct intel_dp *intel_dp, > - const struct intel_crtc_state *crtc_state); > void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock, > u8 *link_bw, u8 *rate_select); > bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp); > diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c > index 91d3979902d0..7876e781f698 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c > +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c > @@ -334,6 +334,24 @@ intel_dp_set_link_train(struct intel_dp *intel_dp, > return drm_dp_dpcd_write(&intel_dp->aux, reg, buf, len) == len; > } > > +void intel_dp_set_signal_levels(struct intel_dp *intel_dp, > + const struct intel_crtc_state *crtc_state) Can't it be static now? Hmm, apparently not due to the ad-hoc phy test code. Oh well. Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > +{ > + struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); > + u8 train_set = intel_dp->train_set[0]; > + > + drm_dbg_kms(&dev_priv->drm, "Using vswing level %d%s\n", > + train_set & DP_TRAIN_VOLTAGE_SWING_MASK, > + train_set & DP_TRAIN_MAX_SWING_REACHED ? " (max)" : ""); > + drm_dbg_kms(&dev_priv->drm, "Using pre-emphasis level %d%s\n", > + (train_set & DP_TRAIN_PRE_EMPHASIS_MASK) >> > + DP_TRAIN_PRE_EMPHASIS_SHIFT, > + train_set & DP_TRAIN_MAX_PRE_EMPHASIS_REACHED ? > + " (max)" : ""); > + > + intel_dp->set_signal_levels(intel_dp, crtc_state); > +} > + > static bool > intel_dp_reset_link_train(struct intel_dp *intel_dp, > const struct intel_crtc_state *crtc_state, > diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.h b/drivers/gpu/drm/i915/display/intel_dp_link_training.h > index 86905aa24db7..c3110c032bc2 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.h > +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.h > @@ -17,6 +17,8 @@ void intel_dp_get_adjust_train(struct intel_dp *intel_dp, > const struct intel_crtc_state *crtc_state, > enum drm_dp_phy dp_phy, > const u8 link_status[DP_LINK_STATUS_SIZE]); > +void intel_dp_set_signal_levels(struct intel_dp *intel_dp, > + const struct intel_crtc_state *crtc_state); > void intel_dp_start_link_train(struct intel_dp *intel_dp, > const struct intel_crtc_state *crtc_state); > void intel_dp_stop_link_train(struct intel_dp *intel_dp, > -- > 2.25.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx