On Fri, Jan 08, 2021 at 05:48:02AM -0800, José Roberto de Souza wrote: > There was some misinterpretation of specification, when DDIX_USED is > set, the next bit means 0 for DP and 1 for HDMI. > > Anyways this misinterpretation is not causing any issues, this change > is just to comply with specification. > Also as for us it do not matters if it is HDMI or DP, not checking the > port type that HTI is using. > > Cc: Anusha Srivatsa <anusha.srivatsa@xxxxxxxxx> > Cc: Matt Roper <matthew.d.roper@xxxxxxxxx> > Signed-off-by: José Roberto de Souza <jose.souza@xxxxxxxxx> Reviewed-by: Matt Roper <matthew.d.roper@xxxxxxxxx> > --- > drivers/gpu/drm/i915/display/intel_ddi.c | 3 +-- > drivers/gpu/drm/i915/i915_reg.h | 3 +-- > 2 files changed, 2 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c > index 3df6913369bc..e90d1af1a54d 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > @@ -5321,8 +5321,7 @@ intel_ddi_max_lanes(struct intel_digital_port *dig_port) > static bool hti_uses_phy(struct drm_i915_private *i915, enum phy phy) > { > return i915->hti_state & HDPORT_ENABLED && > - (i915->hti_state & HDPORT_PHY_USED_DP(phy) || > - i915->hti_state & HDPORT_PHY_USED_HDMI(phy)); > + i915->hti_state & HDPORT_DDI_USED(phy); > } > > static enum hpd_pin dg1_hpd_pin(struct drm_i915_private *dev_priv, > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 0023c023f472..1d8ba10847ca 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -2928,8 +2928,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg) > > #define HDPORT_STATE _MMIO(0x45050) > #define HDPORT_DPLL_USED_MASK REG_GENMASK(14, 12) > -#define HDPORT_PHY_USED_DP(phy) REG_BIT(2 * (phy) + 2) > -#define HDPORT_PHY_USED_HDMI(phy) REG_BIT(2 * (phy) + 1) > +#define HDPORT_DDI_USED(phy) REG_BIT(2 * (phy) + 1) > #define HDPORT_ENABLED REG_BIT(0) > > /* Make render/texture TLB fetches lower priorty than associated data > -- > 2.30.0 > -- Matt Roper Graphics Software Engineer VTT-OSGC Platform Enablement Intel Corporation (916) 356-2795 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx