On Wed, Dec 30, 2020 at 05:07:34PM +0000, Chris Wilson wrote: > Since multiple connectors may run intel_dp_aux_xfer conncurrently, a > single global pm_qos does not suffice. (One connector may disable the > dma-latency boost prematurely while the second is still depending on > it.) Instead of a single global pm_qos, track the pm_qos request for > each intel_dp. > > v2: Move the pm_qos setup/teardown to intel_dp_aux_init/fini > > Fixes: 9ee32fea5fe8 ("drm/i915: irq-drive the dp aux communication") > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > Cc: Imre Deak <imre.deak@xxxxxxxxx> Reviewed-by: Imre Deak <imre.deak@xxxxxxxxx> > --- > drivers/gpu/drm/i915/display/intel_display_types.h | 3 +++ > drivers/gpu/drm/i915/display/intel_dp.c | 6 ++++-- > drivers/gpu/drm/i915/i915_drv.c | 5 ----- > drivers/gpu/drm/i915/i915_drv.h | 3 --- > 4 files changed, 7 insertions(+), 10 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h > index b86ba1bdbaa3..1067bd073c95 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_types.h > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h > @@ -1463,6 +1463,9 @@ struct intel_dp { > bool rgb_to_ycbcr; > } dfp; > > + /* To control wakeup latency, e.g. for irq-driven dp aux transfers. */ > + struct pm_qos_request pm_qos; > + > /* Display stream compression testing */ > bool force_dsc_en; > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c > index 357f7921e070..dafb1334f91a 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -1512,7 +1512,7 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp, > * lowest possible wakeup latency and so prevent the cpu from going into > * deep sleep states. > */ > - cpu_latency_qos_update_request(&i915->pm_qos, 0); > + cpu_latency_qos_update_request(&intel_dp->pm_qos, 0); > > intel_dp_check_edp(intel_dp); > > @@ -1643,7 +1643,7 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp, > > ret = recv_bytes; > out: > - cpu_latency_qos_update_request(&i915->pm_qos, PM_QOS_DEFAULT_VALUE); > + cpu_latency_qos_update_request(&intel_dp->pm_qos, PM_QOS_DEFAULT_VALUE); > > if (vdd) > edp_panel_vdd_off(intel_dp, false); > @@ -1919,6 +1919,7 @@ static i915_reg_t tgl_aux_data_reg(struct intel_dp *intel_dp, int index) > static void > intel_dp_aux_fini(struct intel_dp *intel_dp) > { > + cpu_latency_qos_remove_request(&intel_dp->pm_qos); > kfree(intel_dp->aux.name); > } > > @@ -1971,6 +1972,7 @@ intel_dp_aux_init(struct intel_dp *intel_dp) > encoder->base.name); > > intel_dp->aux.transfer = intel_dp_aux_transfer; > + cpu_latency_qos_add_request(&intel_dp->pm_qos, PM_QOS_DEFAULT_VALUE); > } > > bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp) > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > index 5708e11d917b..249f765993f7 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -578,8 +578,6 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv) > > pci_set_master(pdev); > > - cpu_latency_qos_add_request(&dev_priv->pm_qos, PM_QOS_DEFAULT_VALUE); > - > intel_gt_init_workarounds(dev_priv); > > /* On the 945G/GM, the chipset reports the MSI capability on the > @@ -626,7 +624,6 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv) > err_msi: > if (pdev->msi_enabled) > pci_disable_msi(pdev); > - cpu_latency_qos_remove_request(&dev_priv->pm_qos); > err_mem_regions: > intel_memory_regions_driver_release(dev_priv); > err_ggtt: > @@ -648,8 +645,6 @@ static void i915_driver_hw_remove(struct drm_i915_private *dev_priv) > > if (pdev->msi_enabled) > pci_disable_msi(pdev); > - > - cpu_latency_qos_remove_request(&dev_priv->pm_qos); > } > > /** > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index e38a10d5c128..5e5bcef20e33 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -891,9 +891,6 @@ struct drm_i915_private { > > bool display_irqs_enabled; > > - /* To control wakeup latency, e.g. for irq-driven dp aux transfers. */ > - struct pm_qos_request pm_qos; > - > /* Sideband mailbox protection */ > struct mutex sb_lock; > struct pm_qos_request sb_qos; > -- > 2.20.1 > _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx