Hi, > -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Chris Wilson > Sent: perjantai 4. joulukuuta 2020 13.55 > To: Shankar, Uma <uma.shankar@xxxxxxxxx>; Souza, Jose <jose.souza@xxxxxxxxx>; > intel-gfx@xxxxxxxxxxxxxxxxxxxxx > Subject: Re: [v6 0/2] Re-enable FBC on TGL > > Quoting Shankar, Uma (2020-12-02 13:09:34) > > > > > > > -----Original Message----- > > > From: Souza, Jose <jose.souza@xxxxxxxxx> > > > Sent: Wednesday, December 2, 2020 12:01 AM > > > To: Shankar, Uma <uma.shankar@xxxxxxxxx>; > > > intel-gfx@xxxxxxxxxxxxxxxxxxxxx > > > Cc: ville.syrjala@xxxxxxxxxxxxxxx > > > Subject: Re: [v6 0/2] Re-enable FBC on TGL > > > > > > LGTM, thanks for doing the changes. > > > > Pushed the series to dinq. > > Thanks Jose and Ville for the review and feedback. > > And CI is reporting pipe underruns again, that seem to date back to re-enabling FBC. > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9441/fi-tgl- > y/igt@gem_exec_gttfill@xxxxxxxxxx This still old step/ifwi. > -Chris > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
