On Thu, Nov 26, 2020 at 06:32:02PM +0200, Ville Syrjälä wrote:
> On Thu, Nov 26, 2020 at 01:44:41PM +0530, Uma Shankar wrote:
> > Implemented Infoframes enabled readback for LSPCON devices.
> > This will help align the implementation with state readback
> > infrastructure.
> >
> > v2: Added proper bitmask of enabled infoframes as per Ville's
> > recommendation.
> >
> > v3: Added pcon specific infoframe types instead of using the HSW
> > one's, as recommended by Ville.
> >
> > v4: Addressed Ville's review comment by adding HDMI infoframe
> > versions directly instead of DIP wrappers.
> >
> > Signed-off-by: Uma Shankar <uma.shankar@xxxxxxxxx>
> > ---
> > drivers/gpu/drm/i915/display/intel_lspcon.c | 57 ++++++++++++++++++++-
> > 1 file changed, 55 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c
> > index 1d3dffade168..4f3c4943e918 100644
> > --- a/drivers/gpu/drm/i915/display/intel_lspcon.c
> > +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
> > @@ -574,11 +574,64 @@ void lspcon_set_infoframes(struct intel_encoder *encoder,
> > buf, ret);
> > }
> >
> > +static bool _lspcon_read_avi_infoframe_enabled_mca(struct drm_dp_aux *aux)
> > +{
> > + int ret;
> > + u32 val = 0;
> > + u16 reg = LSPCON_MCA_AVI_IF_CTRL;
> > +
> > + ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> > + if (ret < 0) {
> > + DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
> > + return false;
> > + }
> > +
> > + return val & LSPCON_MCA_AVI_IF_KICKOFF;
> > +}
> > +
> > +static bool _lspcon_read_avi_infoframe_enabled_parade(struct drm_dp_aux *aux)
> > +{
> > + int ret;
> > + u32 val = 0;
> > + u16 reg = LSPCON_PARADE_AVI_IF_CTRL;
> > +
> > + ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> > + if (ret < 0) {
> > + DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
> > + return false;
> > + }
> > +
> > + return val & LSPCON_PARADE_AVI_IF_KICKOFF;
> > +}
> > +
> > u32 lspcon_infoframes_enabled(struct intel_encoder *encoder,
> > const struct intel_crtc_state *pipe_config)
> > {
> > - /* FIXME actually read this from the hw */
> > - return 0;
> > + struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> > + struct intel_lspcon *lspcon = enc_to_intel_lspcon(encoder);
> > + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> > + bool infoframes_enabled;
> > + u32 val = 0;
> > + u32 mask, tmp;
> > +
> > + if (lspcon->vendor == LSPCON_VENDOR_MCA)
> > + infoframes_enabled = _lspcon_read_avi_infoframe_enabled_mca(&intel_dp->aux);
> > + else
> > + infoframes_enabled = _lspcon_read_avi_infoframe_enabled_parade(&intel_dp->aux);
> > +
> > + if (infoframes_enabled)
> > + val |= intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI);
> > +
> > + if (lspcon->hdr_supported) {
> > + tmp = intel_de_read(dev_priv,
> > + HSW_TVIDEO_DIP_CTL(pipe_config->cpu_transcoder));
> > + mask = VIDEO_DIP_ENABLE_GMP_HSW;
> > +
> > + if (tmp & mask)
> > + val |= intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA);
> > + }
> > +
> > + return val;
> > }
>
> This seem broken until patch 10 which avoids the
Actually, make that patch 11
> remapping from DIP bits to the index. With some reordering
> of the patches this seems good.
>
> Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> >
> > void lspcon_wait_pcon_mode(struct intel_lspcon *lspcon)
> > --
> > 2.26.2
>
> --
> Ville Syrjälä
> Intel
--
Ville Syrjälä
Intel
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