From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Replace some copy-pasta with a function.
Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
---
drivers/gpu/drm/i915/intel_pm.c | 35 ++++++++++++++++++++-------------
1 file changed, 21 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index d951dab840f9..c2851bb1975d 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4808,6 +4808,21 @@ struct skl_plane_ddb_iter {
u16 start, size;
};
+static u16
+skl_allocate_plane_ddb(struct skl_plane_ddb_iter *iter,
+ const struct skl_wm_level *wm,
+ u64 data_rate)
+{
+ u16 extra;
+
+ extra = min_t(u16, iter->size,
+ DIV64_U64_ROUND_UP(iter->size * data_rate, iter->data_rate));
+ iter->size -= extra;
+ iter->data_rate -= data_rate;
+
+ return wm->min_ddb_alloc + extra;
+}
+
static int
skl_allocate_pipe_ddb(struct intel_atomic_state *state,
struct intel_crtc *crtc)
@@ -4926,8 +4941,6 @@ skl_allocate_pipe_ddb(struct intel_atomic_state *state,
for_each_plane_id_on_crtc(crtc, plane_id) {
const struct skl_plane_wm *wm =
&crtc_state->wm.skl.optimal.planes[plane_id];
- u64 data_rate;
- u16 extra;
if (plane_id == PLANE_CURSOR)
continue;
@@ -4939,22 +4952,16 @@ skl_allocate_pipe_ddb(struct intel_atomic_state *state,
if (iter.data_rate == 0)
break;
- data_rate = crtc_state->plane_data_rate[plane_id];
- extra = min_t(u16, iter.size,
- DIV64_U64_ROUND_UP(iter.size * data_rate, iter.data_rate));
- iter.total[plane_id] = wm->wm[level].min_ddb_alloc + extra;
- iter.size -= extra;
- iter.data_rate -= data_rate;
+ iter.total[plane_id] =
+ skl_allocate_plane_ddb(&iter, &wm->wm[level],
+ crtc_state->plane_data_rate[plane_id]);
if (iter.data_rate == 0)
break;
- data_rate = crtc_state->uv_plane_data_rate[plane_id];
- extra = min_t(u16, iter.size,
- DIV64_U64_ROUND_UP(iter.size * data_rate, iter.data_rate));
- iter.uv_total[plane_id] = wm->uv_wm[level].min_ddb_alloc + extra;
- iter.size -= extra;
- iter.data_rate -= data_rate;
+ iter.uv_total[plane_id] =
+ skl_allocate_plane_ddb(&iter, &wm->uv_wm[level],
+ crtc_state->uv_plane_data_rate[plane_id]);
}
drm_WARN_ON(&dev_priv->drm, iter.size != 0 || iter.data_rate != 0);
--
2.26.2
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