From: "Huang, Sean Z" <sean.z.huang@xxxxxxxxx> Enable the PXP ioctl action to allow ring3 PXP to query the PXP tag, which is a 32-bit bitwise value indicating the current session info, including protection type, session id, and whether the session is enabled. Signed-off-by: Huang, Sean Z <sean.z.huang@xxxxxxxxx> --- drivers/gpu/drm/i915/pxp/intel_pxp.c | 7 +++++++ drivers/gpu/drm/i915/pxp/intel_pxp.h | 7 +++++++ drivers/gpu/drm/i915/pxp/intel_pxp_sm.c | 28 +++++++++++++++++++++++++ drivers/gpu/drm/i915/pxp/intel_pxp_sm.h | 3 +++ 4 files changed, 45 insertions(+) diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c index 72a2237b504b..2121db05fdb6 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c @@ -78,6 +78,13 @@ int i915_pxp_ops_ioctl(struct drm_device *dev, void *data, struct drm_file *drmf } break; } + case PXP_ACTION_QUERY_PXP_TAG: + { + struct pxp_sm_query_pxp_tag *params = &pxp_info.query_pxp_tag; + + ret = pxp_sm_ioctl_query_pxp_tag(i915, ¶ms->session_is_alive, ¶ms->pxp_tag); + break; + } case PXP_ACTION_SET_R3_CONTEXT: { ret = intel_pxp_set_r3ctx(i915, pxp_info.set_r3ctx); diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h index cbaf25690596..8851c28a0e57 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.h +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h @@ -31,6 +31,7 @@ enum pxp_sm_session_req { }; enum pxp_ioctl_action { + PXP_ACTION_QUERY_PXP_TAG = 0, PXP_ACTION_SET_SESSION_STATUS = 1, PXP_ACTION_SET_R3_CONTEXT = 5, }; @@ -42,6 +43,11 @@ enum pxp_sm_status { PXP_SM_STATUS_ERROR_UNKNOWN }; +struct pxp_sm_query_pxp_tag { + u32 session_is_alive; + u32 pxp_tag; /* in - Session ID, out pxp tag */ +}; + struct pxp_sm_set_session_status_params { /** @pxp_tag: in [optional], for Arbitrator session, out pxp tag */ u32 pxp_tag; @@ -57,6 +63,7 @@ struct pxp_info { u32 action; u32 sm_status; union { + struct pxp_sm_query_pxp_tag query_pxp_tag; struct pxp_sm_set_session_status_params set_session_status; u32 set_r3ctx; }; diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c index b1adfa735d4f..994abf5a8d36 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c @@ -1076,6 +1076,34 @@ int pxp_sm_terminate_protected_session_unsafe(struct drm_i915_private *i915, int return ret; } +int pxp_sm_ioctl_query_pxp_tag(struct drm_i915_private *i915, u32 *session_is_alive, u32 *pxp_tag) +{ + int session_type = 0; + int session_index = 0; + int ret; + + drm_dbg(&i915->drm, ">>> %s\n", __func__); + + if (!session_is_alive || !pxp_tag) { + ret = -EINVAL; + drm_dbg(&i915->drm, "Failed to %s, bad param\n", __func__); + goto end; + } + + ret = pxp_get_session_index(i915, *pxp_tag, &session_index, &session_type); + if (ret) { + drm_dbg(&i915->drm, "Failed to __pxpsessionid_to_sessionid\n"); + goto end; + } + + *pxp_tag = intel_pxp_get_pxp_tag(i915, session_index, session_type, session_is_alive); + + ret = 0; +end: + drm_dbg(&i915->drm, "<<< %s ret=[%d]\n", __func__, ret); + return ret; +} + int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915) { int ret; diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h index 26597b1d18e1..859f3c1f8c6e 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h @@ -108,7 +108,10 @@ int pxp_sm_terminate_protected_session_safe(struct drm_i915_private *i915, int c int session_type, int session_id); int pxp_sm_terminate_protected_session_unsafe(struct drm_i915_private *i915, int session_type, int session_id); +int pxp_sm_ioctl_query_pxp_tag(struct drm_i915_private *i915, u32 *session_is_alive, u32 *pxp_tag); int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915); +u32 intel_pxp_get_pxp_tag(struct drm_i915_private *i915, int session_idx, + int session_type, u32 *session_is_alive); bool intel_pxp_sm_is_any_type0_session_in_play(struct drm_i915_private *i915, int protection_mode); #endif /* __INTEL_PXP_SM_H__ */ -- 2.17.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx