Re: [PATCH 4/6] drm/i915: Precompute can_sagv for each wm level

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



On Fri, Nov 06, 2020 at 07:30:40PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> 
> In order to remove intel_atomic_crtc_state_for_each_plane_state()
> from skl_crtc_can_enable_sagv() we can simply precompute whether
> each wm level can tolerate the SAGV block time latency or not.
> 
> This has the nice side benefit that we remove the duplicated
> wm level latency calculation. In fact the copy of that code
> we had in skl_crtc_can_enable_sagv() didn't even handle
> WaIncreaseLatencyIPCEnabled/Display WA #1141 whereas the copy
> in skl_compute_plane_wm() did. So now we just have the one
> copy which handles all the w/as.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> ---
>  .../drm/i915/display/intel_display_types.h    |  1 +
>  drivers/gpu/drm/i915/intel_pm.c               | 21 +++++++------------
>  2 files changed, 9 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index b977e70e34d7..8a0276044832 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -686,6 +686,7 @@ struct skl_wm_level {
>  	u8 plane_res_l;
>  	bool plane_en;
>  	bool ignore_lines;
> +	bool can_sagv;
>  };
>  
>  struct skl_plane_wm {
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 85b4bfb02e2e..b789ad78319b 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3873,9 +3873,7 @@ static bool skl_crtc_can_enable_sagv(const struct intel_crtc_state *crtc_state)
>  {
>  	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> -	struct intel_plane *plane;
> -	const struct intel_plane_state *plane_state;
> -	int level, latency;
> +	enum plane_id plane_id;
>  
>  	if (!intel_has_sagv(dev_priv))
>  		return false;
> @@ -3886,9 +3884,10 @@ static bool skl_crtc_can_enable_sagv(const struct intel_crtc_state *crtc_state)
>  	if (crtc_state->hw.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE)
>  		return false;
>  
> -	intel_atomic_crtc_state_for_each_plane_state(plane, plane_state, crtc_state) {
> +	for_each_plane_id_on_crtc(crtc, plane_id) {
>  		const struct skl_plane_wm *wm =
> -			&crtc_state->wm.skl.optimal.planes[plane->id];
> +			&crtc_state->wm.skl.optimal.planes[plane_id];
> +		int level;
>  
>  		/* Skip this plane if it's not enabled */
>  		if (!wm->wm[0].plane_en)
> @@ -3899,19 +3898,12 @@ static bool skl_crtc_can_enable_sagv(const struct intel_crtc_state *crtc_state)
>  		     !wm->wm[level].plane_en; --level)
>  		     { }
>  
> -		latency = dev_priv->wm.skl_latency[level];
> -
> -		if (skl_needs_memory_bw_wa(dev_priv) &&
> -		    plane_state->uapi.fb->modifier ==
> -		    I915_FORMAT_MOD_X_TILED)
> -			latency += 15;
> -
>  		/*
>  		 * If any of the planes on this pipe don't enable wm levels that
>  		 * incur memory latencies higher than sagv_block_time_us we
>  		 * can't enable SAGV.
>  		 */
> -		if (latency < dev_priv->sagv_block_time_us)
> +		if (!wm->wm[level].can_sagv)
>  			return false;
>  	}

Ah yet again that "thing". I wonder tbh, do we even need this per level,
as we anyway do "to SAGV or not to SAGV" decision, based on all wm levels.

Also I remember we even discussed that we wanted some clarification here,
as for Gen12+ we actually checking only if we can fit wm0 + block time to ddb.

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@xxxxxxxxx>


>  
> @@ -5375,6 +5367,9 @@ static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state,
>  	/* Bspec says: value >= plane ddb allocation -> invalid, hence the +1 here */
>  	result->min_ddb_alloc = max(min_ddb_alloc, res_blocks) + 1;
>  	result->plane_en = true;
> +
> +	if (INTEL_GEN(dev_priv) < 12)
> +		result->can_sagv = latency >= dev_priv->sagv_block_time_us;
>  }
>  
>  static void
> -- 
> 2.26.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx




[Index of Archives]     [AMD Graphics]     [Linux USB Devel]     [Linux Audio Users]     [Yosemite News]     [Linux Kernel]     [Linux SCSI]

  Powered by Linux