Once upon a time we used to do this by default, back when it was a global seqno with a global barrier on wrap. Since the switch of per-client timelines, handling the wrap is cheaper and yet more complicated, and so worth encouraging early wraps once more. Suggested-by: Thomas Hellström <thomas.hellstrom@xxxxxxxxx> Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> Cc: Thomas Hellström <thomas.hellstrom@xxxxxxxxx> --- drivers/gpu/drm/i915/gt/intel_timeline.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c b/drivers/gpu/drm/i915/gt/intel_timeline.c index 7ea94d201fe6..f0bb1c03b488 100644 --- a/drivers/gpu/drm/i915/gt/intel_timeline.c +++ b/drivers/gpu/drm/i915/gt/intel_timeline.c @@ -263,6 +263,9 @@ static int intel_timeline_init(struct intel_timeline *timeline, timeline->hwsp_ggtt = i915_vma_get(hwsp); GEM_BUG_ON(timeline->hwsp_offset >= hwsp->size); + if (IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM)) + timeline->seqno = -10u; /* wrap after a few requests */ + timeline->fence_context = dma_fence_context_alloc(1); mutex_init(&timeline->mutex); -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
