> -----Original Message----- > From: Anshuman Gupta <anshuman.gupta@xxxxxxxxx> > Sent: Friday, October 23, 2020 5:51 PM > To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx; dri-devel@xxxxxxxxxxxxxxxxxxxxx > Cc: seanpaul@xxxxxxxxxxxx; Nikula, Jani <jani.nikula@xxxxxxxxx>; C, > Ramalingam <ramalingam.c@xxxxxxxxx>; Li, Juston <juston.li@xxxxxxxxx>; > Shankar, Uma <uma.shankar@xxxxxxxxx>; Gupta, Anshuman > <anshuman.gupta@xxxxxxxxx>; Maarten Lankhorst > <maarten.lankhorst@xxxxxxxxxxxxxxx> > Subject: [PATCH v3 11/16] drm/hdcp: Max MST content streams > > Let's define Maximum MST content streams up to four generically which can be > supported by modern display controllers. Looks Good to me. Reviewed-by: Uma Shankar <uma.shankar@xxxxxxxxx> > Cc: Sean Paul <seanpaul@xxxxxxxxxxxx> > Cc: Ramalingam C <ramalingam.c@xxxxxxxxx> > Acked-by: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx> > Signed-off-by: Anshuman Gupta <anshuman.gupta@xxxxxxxxx> > --- > include/drm/drm_hdcp.h | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h index > fe58dbb46962..ac22c246542a 100644 > --- a/include/drm/drm_hdcp.h > +++ b/include/drm/drm_hdcp.h > @@ -101,11 +101,11 @@ > > /* Following Macros take a byte at a time for bit(s) masking */ > /* > - * TODO: This has to be changed for DP MST, as multiple stream on > - * same port is possible. > - * For HDCP2.2 on HDMI and DP SST this value is always 1. > + * TODO: HDCP_2_2_MAX_CONTENT_STREAMS_CNT is based upon actual > + * H/W MST streams capacity. > + * This required to be moved out to platform specific header. > */ > -#define HDCP_2_2_MAX_CONTENT_STREAMS_CNT 1 > +#define HDCP_2_2_MAX_CONTENT_STREAMS_CNT 4 > #define HDCP_2_2_TXCAP_MASK_LEN 2 > #define HDCP_2_2_RXCAPS_LEN 3 > #define HDCP_2_2_RX_REPEATER(x) ((x) & BIT(0)) > -- > 2.26.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
