On Mon, Oct 19, 2020 at 10:56:09AM -0700, José Roberto de Souza wrote:
> Underruns happens when plane height + y offset is not a module of 4
I think you meant 'modulo' rather than 'module' here.
> when FBC is enabled.
Technically the workaround calls for us to just do our FBC disables for
non-modulo 4 planes when the scanline is at vactive-10, but that doesn't
seem to be something that's actually feasible to do at the software
level. Just keeping FBC disabled when working with planes of the
problematic size as you do here does seem like the safest approach.
Should we make a note of our slight deviation from the workaround
details here?
>
> Specification says that it only affects TGL display C stepping and
> newer but to simply the check and as TGL is already in final costumers
> hands, pre-production display stepping A and B was also included.
>
> BSpec: 52887 ICL
> BSpec: 52888 EHL/JSL
> BSpec: 52890/55378 TGL
> BSpec: 53508 DG1
> BSpec: 53273 RKL
> Signed-off-by: José Roberto de Souza <jose.souza@xxxxxxxxx>
Up to you whether you tweak the commit message as noted above or not.
Otherwise,
Reviewed-by: Matt Roper <matthew.d.roper@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_fbc.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 135f5e8a4d70..a5b072816a7b 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -907,6 +907,13 @@ static bool intel_fbc_can_activate(struct intel_crtc *crtc)
> return false;
> }
>
> + /* Wa_22010751166: icl, ehl, tgl, dg1, rkl */
> + if (INTEL_GEN(dev_priv) >= 11 &&
> + (cache->plane.src_h + cache->plane.adjusted_y) % 4) {
> + fbc->no_fbc_reason = "plane height + offset is non-modulo of 4";
> + return false;
> + }
> +
> return true;
> }
>
> --
> 2.28.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
