On Mon, 2020-10-12 at 19:12 +0100, Mun, Gwan-gyeong wrote:
> After applying this patch, the psr screen glitch issue is still seen.
Same IOMMU errors too? In my end it is fixed.
Can you also give a try without the DMC firmware and without this changes?
> On Fri, 2020-10-02 at 16:16 -0700, José Roberto de Souza wrote:
> > Writes to CURSURFLIVE in TGL are causing IOMMU errors and visual
> > glitches that are often reproduced when executing CPU intensive
> > workloads while a eDP 4K panel is attached.
> >
> > Manually exiting PSR causes the frontbuffer to be updated without
> > glitches and the IOMMU errors are also gone but this comes at the
> > cost
> > of less time with PSR active.
> >
> > So using this workaround until this issue is root caused and a better
> > fix is found.
> >
> > The current code is already ready to enable PSR after this exit if
> > there is not other frontbuffer modifications.
> >
> > Adding a new if block in psr_force_hw_tracking_exit() instead of
> > reuse
> > the else/gen8- block because the plan is to revert this workaround
> > as soon as a better solution is found.
> >
> > Cc: Gwan-gyeong Mun <gwan-gyeong.mun@xxxxxxxxx>
> > Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> > Signed-off-by: José Roberto de Souza <jose.souza@xxxxxxxxx>
> > ---
> > drivers/gpu/drm/i915/display/intel_psr.c | 16 +++++++++++++++-
> > 1 file changed, 15 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index 8a9d0bdde1bf..8630121dbbbe 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -1152,7 +1152,21 @@ void intel_psr_disable(struct intel_dp
> > *intel_dp,
> >
> >
> >
> >
> > static void psr_force_hw_tracking_exit(struct drm_i915_private
> > *dev_priv)
> > {
> > - if (INTEL_GEN(dev_priv) >= 9)
> > + if (IS_TIGERLAKE(dev_priv))
> > + /*
> > + * Writes to CURSURFLIVE in TGL are causing IOMMU
> > errors and
> > + * visual glitches that are often reproduced when
> > executing
> > + * CPU intensive workloads while a eDP 4K panel is
> > attached.
> > + *
> > + * Manually exiting PSR causes the frontbuffer to be
> > updated
> > + * without glitches and the IOMMU errors are also gone
> > but
> > + * this comes at the cost of less time with PSR active.
> > + *
> > + * So using this workaround until this issue is root
> > caused
> > + * and a better fix is found.
> > + */
> > + intel_psr_exit(dev_priv);
> > + else if (INTEL_GEN(dev_priv) >= 9)
> > /*
> > * Display WA #0884: skl+
> > * This documented WA for bxt can be safely applied
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