On Thu, 01 Oct 2020, Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx> wrote:
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> Extend the eDP panel power cycle delay wait on reboot handling
> to cover all platforms. No reason to think that VLV/CHV are
> in any way special since the documentation states that the
> hardware power cycle delay goes back to its default value on
> reset, and that may not be enough for all panels.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Reviewed-by: Jani Nikula <jani.nikula@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 1 +
> drivers/gpu/drm/i915/display/intel_dp.c | 5 ++---
> drivers/gpu/drm/i915/display/intel_dp.h | 1 +
> 3 files changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 5742394c8292..e3fcd2591a6c 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -5175,6 +5175,7 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
> encoder->get_hw_state = intel_ddi_get_hw_state;
> encoder->get_config = intel_ddi_get_config;
> encoder->suspend = intel_dp_encoder_suspend;
> + encoder->shutdown = intel_dp_encoder_shutdown;
> encoder->get_power_domains = intel_ddi_get_power_domains;
>
> encoder->type = INTEL_OUTPUT_DDI;
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index e0f2e9236785..3a14a003b4c9 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -6684,7 +6684,7 @@ void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder)
> edp_panel_vdd_off_sync(intel_dp);
> }
>
> -static void intel_dp_encoder_shutdown(struct intel_encoder *intel_encoder)
> +void intel_dp_encoder_shutdown(struct intel_encoder *intel_encoder)
> {
> struct intel_dp *intel_dp = enc_to_intel_dp(intel_encoder);
> intel_wakeref_t wakeref;
> @@ -8029,8 +8029,7 @@ bool intel_dp_init(struct drm_i915_private *dev_priv,
> intel_encoder->get_config = intel_dp_get_config;
> intel_encoder->update_pipe = intel_panel_update_backlight;
> intel_encoder->suspend = intel_dp_encoder_suspend;
> - if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
> - intel_encoder->shutdown = intel_dp_encoder_shutdown;
> + intel_encoder->shutdown = intel_dp_encoder_shutdown;
> if (IS_CHERRYVIEW(dev_priv)) {
> intel_encoder->pre_pll_enable = chv_dp_pre_pll_enable;
> intel_encoder->pre_enable = chv_pre_enable_dp;
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
> index 66854aab9887..7466498d4c01 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -57,6 +57,7 @@ void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp,
> bool enable);
> void intel_dp_encoder_reset(struct drm_encoder *encoder);
> void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder);
> +void intel_dp_encoder_shutdown(struct intel_encoder *intel_encoder);
> void intel_dp_encoder_flush_work(struct drm_encoder *encoder);
> int intel_dp_compute_config(struct intel_encoder *encoder,
> struct intel_crtc_state *pipe_config,
--
Jani Nikula, Intel Open Source Graphics Center
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