On Wed, 23 Sep 2020 at 12:42, Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> wrote: > > In generating the reference LRC, we want a page-aligned address for > simplicity in computing the offsets within. This then shares the > computation for the HW LRC which is mapped and so page aligned, making > the comparison straightforward. It seems that kmalloc(4k) is not always > returning from a 4k-aligned slab cache (which would give us a page aligned > address) so force alignment by explicitly allocating a page. > > Reported-by: "Gote, Nitin R" <nitin.r.gote@xxxxxxxxx> > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Cc: "Gote, Nitin R" <nitin.r.gote@xxxxxxxxx> Reviewed-by: Matthew Auld <matthew.auld@xxxxxxxxx> _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
