On Tue, Sep 22, 2020 at 10:46:52PM -0700, Navare, Manasi wrote: > On Thu, Sep 17, 2020 at 03:20:46PM +0300, Ville Syrjälä wrote: > > On Tue, Sep 15, 2020 at 04:03:45PM -0700, Navare, Manasi wrote: > > > On Mon, Sep 14, 2020 at 10:47:56PM +0300, Ville Syrjälä wrote: > > > > On Mon, Sep 14, 2020 at 12:38:57PM -0700, Navare, Manasi wrote: > > > > > On Mon, Sep 14, 2020 at 10:17:57PM +0300, Ville Syrjälä wrote: > > > > > > On Mon, Sep 14, 2020 at 12:00:33PM -0700, Navare, Manasi wrote: > > > > > > > On Mon, Sep 07, 2020 at 02:20:56PM +0300, Ville Syrjälä wrote: > > > > > > > > On Wed, Jul 15, 2020 at 03:42:15PM -0700, Manasi Navare wrote: > > > > > > > > > From: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx> > > > > > > > > > > > > > > > > > > Small changes to intel_dp_mode_valid(), allow listing modes that > > > > > > > > > can only be supported in the bigjoiner configuration, which is > > > > > > > > > not supported yet. > > > > > > > > > > > > > > > > > > eDP does not support bigjoiner, so do not expose bigjoiner only > > > > > > > > > modes on the eDP port. > > > > > > > > > > > > > > > > > > v5: > > > > > > > > > * Increase max plane width to support 8K with bigjoiner (Maarten) > > > > > > > > > v4: > > > > > > > > > * Rebase (Manasi) > > > > > > > > > > > > > > > > > > Changes since v1: > > > > > > > > > - Disallow bigjoiner on eDP. > > > > > > > > > Changes since v2: > > > > > > > > > - Rename intel_dp_downstream_max_dotclock to intel_dp_max_dotclock, > > > > > > > > > and split off the downstream and source checking to its own function. > > > > > > > > > (Ville) > > > > > > > > > v3: > > > > > > > > > * Rebase (Manasi) > > > > > > > > > > > > > > > > > > Signed-off-by: Manasi Navare <manasi.d.navare@xxxxxxxxx> > > > > > > > > > Signed-off-by: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx> > > > > > > > > > --- > > > > > > > > > drivers/gpu/drm/i915/display/intel_display.c | 2 +- > > > > > > > > > drivers/gpu/drm/i915/display/intel_dp.c | 119 ++++++++++++++----- > > > > > > > > > 2 files changed, 91 insertions(+), 30 deletions(-) > > > > > > > > > > > > > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > > > > > > > > > index 78cbfefbfa62..3ecb642805a6 100644 > > > > > > > > > --- a/drivers/gpu/drm/i915/display/intel_display.c > > > > > > > > > +++ b/drivers/gpu/drm/i915/display/intel_display.c > > > > > > > > > @@ -17400,7 +17400,7 @@ intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv, > > > > > > > > > * too big for that. > > > > > > > > > */ > > > > > > > > > if (INTEL_GEN(dev_priv) >= 11) { > > > > > > > > > - plane_width_max = 5120; > > > > > > > > > + plane_width_max = 7680; > > > > > > > > > > > > > > > > This looks misplaced. Planes do no know whether bigjoiner can be used or > > > > > > > > not. They should not care in fact. The caller should have that knowledge > > > > > > > > and can deal with it properly. > > > > > > > > > > > > > > Hmm, so the caller of intel_mode_valid_max_plane_size() should check on the bigjoiner > > > > > > > flag and perhaps if bigjoiner is true then increase the plane_width_max to 7680? > > > > > > > > > > > > > > Am still not sure where this should happen? We need to have the plane max width to be 7680 > > > > > > > before we prune the 8K mode in intel_mode_valid > > > > > > > > > > > > > > Where should this be added according to you? > > > > > > > > > > > > Hmm. I guess we do need to put it into this function given the way this > > > > > > is structured. However we still can't assume bigjoiner can be used since > > > > > > it can't be used on DDI A on icl. So we should probably just pass in a > > > > > > bool here to indicate whether bigjoiner can be used or not. > > > > > > > > > > > > > > > > So in intel_dp_mode_valid() we set bigjoiner = true if not edp and higher clock. > > > > > I think here we need to do the platform check also, 1. because now we are enabling this for TGL+ > > > > > where big joiner on all pipes. But we should still I think add GEN >=12 check before setting bigjoiner > > > > > to true in intel_dp_mode_valid() and then pass that to intel_mode_valid_max_plane_size(..., book bigjoiner) > > > > > > > > can_bigjoiner() { > > > > return gen >= 12 || (gen==11 && port!=A); > > On Gen 11, Port A is eDP or MIPI DSI so I could check: > > can_bigjoiner() > { > return gen >=12 || (gen == 11 && !intel_dp_is_edp()) > } > > The above should be okay right? No. Check for port A. -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx