On Tue, Sep 22, 2020 at 03:51:01PM +0300, Imre Deak wrote: > The link status is used to communicate the parameters of the link > training with the DPRX and determine if the link training is successful > or a retraining is needed. Accordingly move the function to read the > link status to intel_dp_link_training.c > > Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx> > --- > drivers/gpu/drm/i915/display/intel_dp.c | 11 ----------- > drivers/gpu/drm/i915/display/intel_dp.h | 2 -- > .../drm/i915/display/intel_dp_link_training.c | 16 ++++++++++++++++ > .../drm/i915/display/intel_dp_link_training.h | 3 +++ > 4 files changed, 19 insertions(+), 13 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c > index 2a4a9c0e7427..ee93a00a4d5e 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -4126,17 +4126,6 @@ static void chv_dp_post_pll_disable(struct intel_atomic_state *state, > chv_phy_post_pll_disable(encoder, old_crtc_state); > } > > -/* > - * Fetch AUX CH registers 0x202 - 0x207 which contain > - * link status information > - */ > -bool > -intel_dp_get_link_status(struct intel_dp *intel_dp, u8 link_status[DP_LINK_STATUS_SIZE]) > -{ > - return drm_dp_dpcd_read(&intel_dp->aux, DP_LANE0_1_STATUS, link_status, > - DP_LINK_STATUS_SIZE) == DP_LINK_STATUS_SIZE; > -} > - > static u8 intel_dp_voltage_max_2(struct intel_dp *intel_dp) > { > return DP_TRAIN_VOLTAGE_SWING_LEVEL_2; > diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h > index 08a1c0aa8b94..34ae7988a554 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.h > +++ b/drivers/gpu/drm/i915/display/intel_dp.h > @@ -100,8 +100,6 @@ void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock, > u8 *link_bw, u8 *rate_select); > bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp); > bool intel_dp_source_supports_hbr3(struct intel_dp *intel_dp); > -bool > -intel_dp_get_link_status(struct intel_dp *intel_dp, u8 *link_status); > > bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp); > int intel_dp_link_required(int pixel_clock, int bpp); > diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c > index f8b53c5b5777..6d13d00db5e6 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c > +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c > @@ -34,6 +34,22 @@ intel_dp_dump_link_status(const u8 link_status[DP_LINK_STATUS_SIZE]) > link_status[3], link_status[4], link_status[5]); > } > > +/** > + * intel_dp_get_link_status - get the link status information for the DPRX > + * @intel_dp: DP struct > + * @link_status: buffer to return the status in > + * > + * Fetch the AUX DPCD registers for the DPRX link status. > + * > + * Returns true if the information was read successfully, false otherwise. > + */ > +bool > +intel_dp_get_link_status(struct intel_dp *intel_dp, u8 link_status[DP_LINK_STATUS_SIZE]) > +{ > + return drm_dp_dpcd_read(&intel_dp->aux, DP_LANE0_1_STATUS, link_status, > + DP_LINK_STATUS_SIZE) == DP_LINK_STATUS_SIZE; > +} > + > static u8 dp_voltage_max(u8 preemph) > { > switch (preemph & DP_TRAIN_PRE_EMPHASIS_MASK) { > diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.h b/drivers/gpu/drm/i915/display/intel_dp_link_training.h > index 01f1dabbb060..47c97f4a0d57 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.h > +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.h > @@ -10,6 +10,9 @@ > > struct intel_dp; > > +bool intel_dp_get_link_status(struct intel_dp *intel_dp, > + u8 link_status[DP_LINK_STATUS_SIZE]); > + Do we still need it outside? Hmm, I guess we do. Oh well Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > void intel_dp_get_adjust_train(struct intel_dp *intel_dp, > const u8 link_status[DP_LINK_STATUS_SIZE]); > void intel_dp_start_link_train(struct intel_dp *intel_dp); > -- > 2.17.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx