> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Ville
> Syrjala
> Sent: Saturday, July 18, 2020 2:44 AM
> To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> Subject: [PATCH 08/20] drm/i915: Add glk+ degamma readout
>
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> Read out the degamma LUT on glk+. No state cheker as of yet since it requires
> dealing with he glk csc vs. degamma mess.
s/he/the
With this,
Reviewed-by: Uma Shankar <uma.shankar@xxxxxxxxx>
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_color.c | 44 ++++++++++++++++++++++
> 1 file changed, 44 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_color.c
> b/drivers/gpu/drm/i915/display/intel_color.c
> index 260bbbd5bbf2..437cc56925ab 100644
> --- a/drivers/gpu/drm/i915/display/intel_color.c
> +++ b/drivers/gpu/drm/i915/display/intel_color.c
> @@ -1955,10 +1955,51 @@ static struct drm_property_blob
> *bdw_read_lut_10(struct intel_crtc *crtc,
> return blob;
> }
>
> +static struct drm_property_blob *glk_read_degamma_lut(struct intel_crtc
> +*crtc) {
> + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> + int i, lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size;
> + enum pipe pipe = crtc->pipe;
> + struct drm_property_blob *blob;
> + struct drm_color_lut *lut;
> +
> + blob = drm_property_create_blob(&dev_priv->drm,
> + sizeof(struct drm_color_lut) * lut_size,
> + NULL);
> + if (IS_ERR(blob))
> + return NULL;
> +
> + lut = blob->data;
> +
> + /*
> + * When setting the auto-increment bit, the hardware seems to
> + * ignore the index bits, so we need to reset it to index 0
> + * separately.
> + */
> + intel_de_write(dev_priv, PRE_CSC_GAMC_INDEX(pipe), 0);
> + intel_de_write(dev_priv, PRE_CSC_GAMC_INDEX(pipe),
> + PRE_CSC_GAMC_AUTO_INCREMENT);
> +
> + for (i = 0; i < lut_size; i++) {
> + u32 val = intel_de_read(dev_priv, PRE_CSC_GAMC_DATA(pipe));
> +
> + lut[i].red = val;
> + lut[i].green = val;
> + lut[i].blue = val;
> + }
> +
> + intel_de_write(dev_priv, PRE_CSC_GAMC_INDEX(pipe), 0);
> +
> + return blob;
> +}
> +
> static void glk_read_luts(struct intel_crtc_state *crtc_state) {
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>
> + if (crtc_state->csc_enable)
> + crtc_state->hw.degamma_lut = glk_read_degamma_lut(crtc);
> +
> if (!crtc_state->gamma_enable)
> return;
>
> @@ -2010,6 +2051,9 @@ static void icl_read_luts(struct intel_crtc_state
> *crtc_state) {
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>
> + if (crtc_state->gamma_mode & PRE_CSC_GAMMA_ENABLE)
> + crtc_state->hw.degamma_lut = glk_read_degamma_lut(crtc);
> +
> if ((crtc_state->gamma_mode & POST_CSC_GAMMA_ENABLE) == 0)
> return;
>
> --
> 2.26.2
>
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