On Wed, Sep 16, 2020 at 09:45:28PM +0530, Vandita Kulkarni wrote:
> In TE Gate mode or TE NO_GATE mode on every flip
> we need to set the frame update request bit.
> After this bit is set transcoder hardware will
> automatically send the frame data to the panel
> in case of TE NO_GATE mode, where it sends after
> it receives the TE event in case of TE_GATE mode.
> Once the frame data is sent to the panel, we see
> the frame counter updating.
>
> v2: Use intel_de_read/write
>
> v3: remove the usage of private_flags
>
> v4: Use icl_dsi in func names if non static,
> fix code formatting issues. (Jani)
>
> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/icl_dsi.c | 26 ++++++++++++++++++++
> drivers/gpu/drm/i915/display/intel_display.c | 10 ++++++++
> drivers/gpu/drm/i915/display/intel_dsi.h | 1 +
> 3 files changed, 37 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
> index 2789020e20db..7d2abc7f6ba3 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -205,6 +205,32 @@ static int dsi_send_pkt_payld(struct intel_dsi_host *host,
> return 0;
> }
>
> +void icl_dsi_frame_update(struct intel_crtc_state *crtc_state)
> +{
> + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> + u32 tmp, flags;
> + enum port port;
> +
> + flags = crtc->mode_flags;
> +
> + /*
> + * case 1 also covers dual link
> + * In case of dual link, frame update should be set on
> + * DSI_0
> + */
> + if (flags & I915_MODE_FLAG_DSI_USE_TE0)
> + port = PORT_A;
> + else if (flags & I915_MODE_FLAG_DSI_USE_TE1)
> + port = PORT_B;
> + else
> + return;
> +
> + tmp = intel_de_read(dev_priv, DSI_CMD_FRMCTL(port));
> + tmp |= DSI_FRAME_UPDATE_REQUEST;
> + intel_de_write(dev_priv, DSI_CMD_FRMCTL(port), tmp);
> +}
> +
> static void dsi_program_swing_and_deemphasis(struct intel_encoder *encoder)
> {
> struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index f862403388f6..11a20bf2255f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -15621,6 +15621,16 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
> intel_set_cdclk_post_plane_update(state);
> }
>
> + /*
> + * Incase of mipi dsi command mode, we need to set frame update
> + * for every commit
> + */
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i)
> + if (INTEL_GEN(dev_priv) >= 11 &&
> + intel_crtc_has_type(new_crtc_state, INTEL_OUTPUT_DSI))
> + if (new_crtc_state->hw.active)
> + icl_dsi_frame_update(new_crtc_state);
If this is the thing that triggers the update then it should
probably be called at the start of intel_pipe_update_end().
> +
> /* FIXME: We should call drm_atomic_helper_commit_hw_done() here
> * already, but still need the state for the delayed optimization. To
> * fix this:
> diff --git a/drivers/gpu/drm/i915/display/intel_dsi.h b/drivers/gpu/drm/i915/display/intel_dsi.h
> index 19f78a4022d3..625f2f1ae061 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsi.h
> +++ b/drivers/gpu/drm/i915/display/intel_dsi.h
> @@ -167,6 +167,7 @@ static inline u16 intel_dsi_encoder_ports(struct intel_encoder *encoder)
>
> /* icl_dsi.c */
> void icl_dsi_init(struct drm_i915_private *dev_priv);
> +void icl_dsi_frame_update(struct intel_crtc_state *crtc_state);
>
> /* intel_dsi.c */
> int intel_dsi_bitrate(const struct intel_dsi *intel_dsi);
> --
> 2.21.0.5.gaeb582a
--
Ville Syrjälä
Intel
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