On Tue, 08 Sep 2020, Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx> wrote:
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> The CACHE_MODE_0 save/restore was added without explanation in
> commit 1f84e550a870 ("drm/i915 more registers for S3 (DSPCLK_GATE_D,
> CACHE_MODE_0, MI_ARB_STATE)"). If there are any bits we care about
> those should be set explicitly during some appropriate init function.
> Let's assume it's all good and just nuke this magic save/restore.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Acked-by: Jani Nikula <jani.nikula@xxxxxxxxx>
Some of these will probably conflict with the patches I merged
today. The resolution is trivial, and the patches probably apply with
less context. I think it's fine to apply without re-testing.
BR,
Jani.
> ---
> drivers/gpu/drm/i915/i915_drv.h | 1 -
> drivers/gpu/drm/i915/i915_suspend.c | 9 ---------
> 2 files changed, 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index cf51246b5402..537c780af858 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -537,7 +537,6 @@ struct intel_gmbus {
>
> struct i915_suspend_saved_registers {
> u32 saveDSPARB;
> - u32 saveCACHE_MODE_0;
> u32 saveSWF0[16];
> u32 saveSWF1[16];
> u32 saveSWF3[3];
> diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
> index 34c7d7bccec5..932c7df64dd3 100644
> --- a/drivers/gpu/drm/i915/i915_suspend.c
> +++ b/drivers/gpu/drm/i915/i915_suspend.c
> @@ -62,10 +62,6 @@ int i915_save_state(struct drm_i915_private *dev_priv)
> pci_read_config_word(pdev, GCDGMBUS,
> &dev_priv->regfile.saveGCDGMBUS);
>
> - /* Cache mode state */
> - if (INTEL_GEN(dev_priv) < 7)
> - dev_priv->regfile.saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);
> -
> /* Scratch space */
> if (IS_GEN(dev_priv, 2) && IS_MOBILE(dev_priv)) {
> for (i = 0; i < 7; i++) {
> @@ -99,11 +95,6 @@ int i915_restore_state(struct drm_i915_private *dev_priv)
> dev_priv->regfile.saveGCDGMBUS);
> i915_restore_display(dev_priv);
>
> - /* Cache mode state */
> - if (INTEL_GEN(dev_priv) < 7)
> - I915_WRITE(CACHE_MODE_0, dev_priv->regfile.saveCACHE_MODE_0 |
> - 0xffff0000);
> -
> /* Scratch space */
> if (IS_GEN(dev_priv, 2) && IS_MOBILE(dev_priv)) {
> for (i = 0; i < 7; i++) {
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
