Re: [PATCH 2/5] Critical-KlockWork-Fixes-intel_display.c-NullDeref

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Hi Nischal,

Thank you for the patch! Perhaps something to improve:

url:    https://github.com/0day-ci/linux/commits/Nischal-Varide/Critical-KclockWork-Fixes-intel_atomi-c-PossibleNull/20200819-193249
base:   git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-randconfig-m021-20200824 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@xxxxxxxxx>
Reported-by: Dan Carpenter <dan.carpenter@xxxxxxxxxx>

New smatch warnings:
drivers/gpu/drm/i915/display/intel_display.c:2271 intel_pin_and_fence_fb_obj() error: uninitialized symbol 'vma'.
drivers/gpu/drm/i915/display/intel_display.c:11280 intel_cursor_base() error: uninitialized symbol 'base'.

Old smatch warnings:
drivers/gpu/drm/i915/display/intel_display.c:6183 skl_update_scaler_plane() error: we previously assumed 'fb' could be null (see line 6167)

# https://github.com/0day-ci/linux/commit/5d862961b8571914f726e947570316016ec67c5d
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Nischal-Varide/Critical-KclockWork-Fixes-intel_atomi-c-PossibleNull/20200819-193249
git checkout 5d862961b8571914f726e947570316016ec67c5d
vim +/vma +2271 drivers/gpu/drm/i915/display/intel_display.c

058d88c4330f96 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2016-08-15  2217  struct i915_vma *
5935485f8eee35 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2018-02-20  2218  intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb,
f5929c5309a6a4 drivers/gpu/drm/i915/intel_display.c         Ville Syrjälä          2018-09-07  2219  			   const struct i915_ggtt_view *view,
f7a02ad7d16b24 drivers/gpu/drm/i915/intel_display.c         Ville Syrjälä          2018-02-21  2220  			   bool uses_fence,
5935485f8eee35 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2018-02-20  2221  			   unsigned long *out_flags)
6b95a207c1fd55 drivers/gpu/drm/i915/intel_display.c         Kristian Høgsberg      2009-11-18  2222  {
850c4cdc6c223d drivers/gpu/drm/i915/intel_display.c         Tvrtko Ursulin         2014-10-30  2223  	struct drm_device *dev = fb->dev;
fac5e23e3c385f drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2016-07-04  2224  	struct drm_i915_private *dev_priv = to_i915(dev);
850c4cdc6c223d drivers/gpu/drm/i915/intel_display.c         Tvrtko Ursulin         2014-10-30  2225  	struct drm_i915_gem_object *obj = intel_fb_obj(fb);
1d264d91befc31 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2019-01-14  2226  	intel_wakeref_t wakeref;
058d88c4330f96 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2016-08-15  2227  	struct i915_vma *vma;
5935485f8eee35 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2018-02-20  2228  	unsigned int pinctl;
6b95a207c1fd55 drivers/gpu/drm/i915/intel_display.c         Kristian Høgsberg      2009-11-18  2229  	u32 alignment;
6b95a207c1fd55 drivers/gpu/drm/i915/intel_display.c         Kristian Høgsberg      2009-11-18  2230  
e57291c2d39522 drivers/gpu/drm/i915/display/intel_display.c Pankaj Bharadiya       2020-02-20  2231  	if (drm_WARN_ON(dev, !i915_gem_object_is_framebuffer(obj)))
5a90606df7cb73 drivers/gpu/drm/i915/display/intel_display.c Chris Wilson           2019-09-02  2232  		return ERR_PTR(-EINVAL);
ebcdd39eafb1d8 drivers/gpu/drm/i915/intel_display.c         Matt Roper             2014-07-09  2233  
d88c4afddc5519 drivers/gpu/drm/i915/intel_display.c         Ville Syrjälä          2017-03-07  2234  	alignment = intel_surf_alignment(fb, 0);
e57291c2d39522 drivers/gpu/drm/i915/display/intel_display.c Pankaj Bharadiya       2020-02-20  2235  	if (drm_WARN_ON(dev, alignment && !is_power_of_2(alignment)))
7361bdb26c2ca6 drivers/gpu/drm/i915/display/intel_display.c Imre Deak              2019-12-25  2236  		return ERR_PTR(-EINVAL);
6b95a207c1fd55 drivers/gpu/drm/i915/intel_display.c         Kristian Høgsberg      2009-11-18  2237  
693db1842d864c drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2013-03-05  2238  	/* Note that the w/a also requires 64 PTE of padding following the
693db1842d864c drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2013-03-05  2239  	 * bo. We currently fill all unused PTE with the shadow page and so
693db1842d864c drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2013-03-05  2240  	 * we should always have valid PTE following the scanout preventing
693db1842d864c drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2013-03-05  2241  	 * the VT-d warning.
693db1842d864c drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2013-03-05  2242  	 */
48f112fed3b078 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2016-06-24  2243  	if (intel_scanout_needs_vtd_wa(dev_priv) && alignment < 256 * 1024)
693db1842d864c drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2013-03-05  2244  		alignment = 256 * 1024;
693db1842d864c drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2013-03-05  2245  
d6dd6843ff4a57 drivers/gpu/drm/i915/intel_display.c         Paulo Zanoni           2014-08-15  2246  	/*
d6dd6843ff4a57 drivers/gpu/drm/i915/intel_display.c         Paulo Zanoni           2014-08-15  2247  	 * Global gtt pte registers are special registers which actually forward
d6dd6843ff4a57 drivers/gpu/drm/i915/intel_display.c         Paulo Zanoni           2014-08-15  2248  	 * writes to a chunk of system memory. Which means that there is no risk
d6dd6843ff4a57 drivers/gpu/drm/i915/intel_display.c         Paulo Zanoni           2014-08-15  2249  	 * that the register values disappear as soon as we call
d6dd6843ff4a57 drivers/gpu/drm/i915/intel_display.c         Paulo Zanoni           2014-08-15  2250  	 * intel_runtime_pm_put(), so it is correct to wrap only the
d6dd6843ff4a57 drivers/gpu/drm/i915/intel_display.c         Paulo Zanoni           2014-08-15  2251  	 * pin/unpin/fence and not more.
d6dd6843ff4a57 drivers/gpu/drm/i915/intel_display.c         Paulo Zanoni           2014-08-15  2252  	 */
d858d5695f3897 drivers/gpu/drm/i915/intel_display.c         Daniele Ceraolo Spurio 2019-06-13  2253  	wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
d6dd6843ff4a57 drivers/gpu/drm/i915/intel_display.c         Paulo Zanoni           2014-08-15  2254  
9db529aac9381e drivers/gpu/drm/i915/intel_display.c         Daniel Vetter          2017-08-08  2255  	atomic_inc(&dev_priv->gpu_error.pending_fb_pin);
9db529aac9381e drivers/gpu/drm/i915/intel_display.c         Daniel Vetter          2017-08-08  2256  
8b1c78e06e6167 drivers/gpu/drm/i915/display/intel_display.c Chris Wilson           2019-12-06  2257  	/*
8b1c78e06e6167 drivers/gpu/drm/i915/display/intel_display.c Chris Wilson           2019-12-06  2258  	 * Valleyview is definitely limited to scanning out the first
5935485f8eee35 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2018-02-20  2259  	 * 512MiB. Lets presume this behaviour was inherited from the
5935485f8eee35 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2018-02-20  2260  	 * g4x display engine and that all earlier gen are similarly
5935485f8eee35 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2018-02-20  2261  	 * limited. Testing suggests that it is a little more
5935485f8eee35 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2018-02-20  2262  	 * complicated than this. For example, Cherryview appears quite
5935485f8eee35 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2018-02-20  2263  	 * happy to scanout from anywhere within its global aperture.
5935485f8eee35 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2018-02-20  2264  	 */
8b1c78e06e6167 drivers/gpu/drm/i915/display/intel_display.c Chris Wilson           2019-12-06  2265  	pinctl = 0;
b2ae318acdcaf1 drivers/gpu/drm/i915/intel_display.c         Rodrigo Vivi           2019-02-04  2266  	if (HAS_GMCH(dev_priv))
5935485f8eee35 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2018-02-20  2267  		pinctl |= PIN_MAPPABLE;
5d862961b85719 drivers/gpu/drm/i915/display/intel_display.c Nischal Varide         2020-08-19  2268  	if (obj)
5935485f8eee35 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2018-02-20  2269  		vma = i915_gem_object_pin_to_display_plane(obj,
f5929c5309a6a4 drivers/gpu/drm/i915/intel_display.c         Ville Syrjälä          2018-09-07  2270  			alignment, view, pinctl);

"vma" not initialized on else path.

49ef5294cda256 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2016-08-18 @2271  	if (IS_ERR(vma))
                                                                                                                   ^^^

49ef5294cda256 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2016-08-18  2272  		goto err;
6b95a207c1fd55 drivers/gpu/drm/i915/intel_display.c         Kristian Høgsberg      2009-11-18  2273  
f7a02ad7d16b24 drivers/gpu/drm/i915/intel_display.c         Ville Syrjälä          2018-02-21  2274  	if (uses_fence && i915_vma_is_map_and_fenceable(vma)) {
85798ac9b35f8c drivers/gpu/drm/i915/intel_display.c         Ville Syrjälä          2018-02-21  2275  		int ret;
85798ac9b35f8c drivers/gpu/drm/i915/intel_display.c         Ville Syrjälä          2018-02-21  2276  
8b1c78e06e6167 drivers/gpu/drm/i915/display/intel_display.c Chris Wilson           2019-12-06  2277  		/*
8b1c78e06e6167 drivers/gpu/drm/i915/display/intel_display.c Chris Wilson           2019-12-06  2278  		 * Install a fence for tiled scan-out. Pre-i965 always needs a
6b95a207c1fd55 drivers/gpu/drm/i915/intel_display.c         Kristian Høgsberg      2009-11-18  2279  		 * fence, whereas 965+ only requires a fence if using
49ef5294cda256 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2016-08-18  2280  		 * framebuffer compression.  For simplicity, we always, when
49ef5294cda256 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2016-08-18  2281  		 * possible, install a fence as the cost is not that onerous.
842315ee7e416f drivers/gpu/drm/i915/intel_display.c         Maarten Lankhorst      2015-08-05  2282  		 *
49ef5294cda256 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2016-08-18  2283  		 * If we fail to fence the tiled scanout, then either the
49ef5294cda256 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2016-08-18  2284  		 * modeset will reject the change (which is highly unlikely as
49ef5294cda256 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2016-08-18  2285  		 * the affected systems, all but one, do not have unmappable
49ef5294cda256 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2016-08-18  2286  		 * space) or we will not be able to enable full powersaving
49ef5294cda256 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2016-08-18  2287  		 * techniques (also likely not to apply due to various limits
49ef5294cda256 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2016-08-18  2288  		 * FBC and the like impose on the size of the buffer, which
49ef5294cda256 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2016-08-18  2289  		 * presumably we violated anyway with this unmappable buffer).
49ef5294cda256 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2016-08-18  2290  		 * Anyway, it is presumably better to stumble onwards with
49ef5294cda256 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2016-08-18  2291  		 * something and try to run the system in a "less than optimal"
49ef5294cda256 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2016-08-18  2292  		 * mode that matches the user configuration.
842315ee7e416f drivers/gpu/drm/i915/intel_display.c         Maarten Lankhorst      2015-08-05  2293  		 */
85798ac9b35f8c drivers/gpu/drm/i915/intel_display.c         Ville Syrjälä          2018-02-21  2294  		ret = i915_vma_pin_fence(vma);
85798ac9b35f8c drivers/gpu/drm/i915/intel_display.c         Ville Syrjälä          2018-02-21  2295  		if (ret != 0 && INTEL_GEN(dev_priv) < 4) {
7509702bd8bd09 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2018-03-05  2296  			i915_gem_object_unpin_from_display_plane(vma);
85798ac9b35f8c drivers/gpu/drm/i915/intel_display.c         Ville Syrjälä          2018-02-21  2297  			vma = ERR_PTR(ret);
85798ac9b35f8c drivers/gpu/drm/i915/intel_display.c         Ville Syrjälä          2018-02-21  2298  			goto err;
85798ac9b35f8c drivers/gpu/drm/i915/intel_display.c         Ville Syrjälä          2018-02-21  2299  		}
85798ac9b35f8c drivers/gpu/drm/i915/intel_display.c         Ville Syrjälä          2018-02-21  2300  
85798ac9b35f8c drivers/gpu/drm/i915/intel_display.c         Ville Syrjälä          2018-02-21  2301  		if (ret == 0 && vma->fence)
5935485f8eee35 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2018-02-20  2302  			*out_flags |= PLANE_HAS_FENCE;
9807216f585fc6 drivers/gpu/drm/i915/intel_display.c         Vivek Kasireddy        2015-10-29  2303  	}
6b95a207c1fd55 drivers/gpu/drm/i915/intel_display.c         Kristian Høgsberg      2009-11-18  2304  
be1e341513ca23 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2017-01-16  2305  	i915_vma_get(vma);
49ef5294cda256 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2016-08-18  2306  err:
9db529aac9381e drivers/gpu/drm/i915/intel_display.c         Daniel Vetter          2017-08-08  2307  	atomic_dec(&dev_priv->gpu_error.pending_fb_pin);
d858d5695f3897 drivers/gpu/drm/i915/intel_display.c         Daniele Ceraolo Spurio 2019-06-13  2308  	intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
058d88c4330f96 drivers/gpu/drm/i915/intel_display.c         Chris Wilson           2016-08-15  2309  	return vma;
6b95a207c1fd55 drivers/gpu/drm/i915/intel_display.c         Kristian Høgsberg      2009-11-18  2310  }

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