Quoting Mika Kuoppala (2020-07-17 09:30:07) > Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes: > > > Add a SRM read back of the aux invalidation register after poking > > hsdes: 1809175790, as failing to do so leads to writes going astray. > > > > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2169 > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > > Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> > > --- > > drivers/gpu/drm/i915/gt/intel_lrc.c | 31 ++++++++++++++++++++++------- > > 1 file changed, 24 insertions(+), 7 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c > > index e0280a672f1d..c9e46792b976 100644 > > --- a/drivers/gpu/drm/i915/gt/intel_lrc.c > > +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c > > @@ -4757,14 +4757,21 @@ static int gen12_emit_flush(struct i915_request *request, u32 mode) > > intel_engine_mask_t aux_inv = 0; > > u32 cmd, *cs; > > > > + cmd = 4; > > + if (mode & EMIT_INVALIDATE) > > + cmd += 2; > > if (mode & EMIT_INVALIDATE) > > aux_inv = request->engine->mask & ~BIT(BCS0); > > + if (aux_inv) > > + cmd += 2 * hweight8(aux_inv) + 6; > > > > - cs = intel_ring_begin(request, > > - 4 + (aux_inv ? 2 * hweight8(aux_inv) + 2 : 0)); > > + cs = intel_ring_begin(request, cmd); > > if (IS_ERR(cs)) > > return PTR_ERR(cs); > > > > + if (mode & EMIT_INVALIDATE) > > + *cs++ = preparser_disable(true); > > This makes sense. Could be even separate patch. > > On invalidate, care to try if the actual invalidate LRI > with POSTED set (after disabling preparser) could also fix this? I may have accidentally broke tgl1-gem and it needs some tlc ;) -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
