Hi Dave & Daniel -
The 2nd and presumably the last i915 feature pull for v5.9.
drm-intel-next-2020-07-15:
drm/i915 features for v5.9, batch #2
Highlights:
- Very early DG1 enabling (Abdiel, Lucas, Anusha)
Gem/GT:
- Fix spinlock recursion on signaling a signaled request (Chris)
- Perf: Use GTT when saving/restoring engine GPR (Umesh Nerlige Ramappa)
- SSEU refactoring, debugfs move under gt/ (Daniele, Venkata Sandeep Dhanalakota)
- Various GT refactoring and cleanup, preparation for future changes (Daniele)
- Adjust HuC state accordingly after GuC fetch error (Michał Winiarski)
- UC debugfs updates (Michał Winiarski)
- Only revoke the GGTT mmappings on aperture detiling changes (Chris)
- Only revoke mmap handlers if active (Chris)
- Split the context's obj:vma lut into its own mutex (Chris)
- Various memory, mmap and performance optimisations (Chris)
- Improve system stability in case of false CS events (Chris)
- Various refactorings and cleanup (Chris)
- Always reset the engine on execlist failures (Chris)
- Trace placement of timeline HWSP (Chris)
- Update dma-attributes for our sg DMA (Chris)
Display:
- TGL CDCLK workaround tweaks to unbreak 8K display support (Stanislav)
- A number of FBC fixes, along with i865 FBC enabling (Ville)
- Validate MST modes against PBN limits (Lyude, Shawn Lee)
- Do not access non-existing swizzle registers (Lucas)
- Revert GEN11+ HBR3 rate fix that caused issues on TGL (Matt Atwood)
- Update TGL+ combo phy initialization to match spec update (José)
- Fix HDCP Content Protection property state machine (Anshuman)
- Fix HDCP revoked keys handling (Ram)
- Improve DDI BUF status checks and waits (Manasi)
- Various SDVO+HDMI+DVI fixes around colorimetry, clocking, pixel repeat etc. (Ville)
- DP voltage swing function refactoring (José)
- WARN if max vswing/pre-emphasis violates the DP spec (Ville)
Other:
- Add new EHL PCI IDs (José)
- Unify struct intel_digital_port variable naming (Lucas)
- Various taint updates to aid debugging and improve CI (Michał Winiarski)
- Straggler conversions to new mmio register accessors (Daniele)
BR,
Jani.
The following changes since commit d524b87f77364db096855d7eb714ffacec974ddf:
drm/i915: Update DRIVER_DATE to 20200702 (2020-07-02 21:25:28 +0300)
are available in the Git repository at:
git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-next-2020-07-15
for you to fetch changes up to e57bd05ec0d2d82d63725dedf9f5a063f879de25:
drm/i915: Update DRIVER_DATE to 20200715 (2020-07-15 14:18:02 +0300)
----------------------------------------------------------------
drm/i915 features for v5.9, batch #2
Highlights:
- Very early DG1 enabling (Abdiel, Lucas, Anusha)
Gem/GT:
- Fix spinlock recursion on signaling a signaled request (Chris)
- Perf: Use GTT when saving/restoring engine GPR (Umesh Nerlige Ramappa)
- SSEU refactoring, debugfs move under gt/ (Daniele, Venkata Sandeep Dhanalakota)
- Various GT refactoring and cleanup, preparation for future changes (Daniele)
- Adjust HuC state accordingly after GuC fetch error (Michał Winiarski)
- UC debugfs updates (Michał Winiarski)
- Only revoke the GGTT mmappings on aperture detiling changes (Chris)
- Only revoke mmap handlers if active (Chris)
- Split the context's obj:vma lut into its own mutex (Chris)
- Various memory, mmap and performance optimisations (Chris)
- Improve system stability in case of false CS events (Chris)
- Various refactorings and cleanup (Chris)
- Always reset the engine on execlist failures (Chris)
- Trace placement of timeline HWSP (Chris)
- Update dma-attributes for our sg DMA (Chris)
Display:
- TGL CDCLK workaround tweaks to unbreak 8K display support (Stanislav)
- A number of FBC fixes, along with i865 FBC enabling (Ville)
- Validate MST modes against PBN limits (Lyude, Shawn Lee)
- Do not access non-existing swizzle registers (Lucas)
- Revert GEN11+ HBR3 rate fix that caused issues on TGL (Matt Atwood)
- Update TGL+ combo phy initialization to match spec update (José)
- Fix HDCP Content Protection property state machine (Anshuman)
- Fix HDCP revoked keys handling (Ram)
- Improve DDI BUF status checks and waits (Manasi)
- Various SDVO+HDMI+DVI fixes around colorimetry, clocking, pixel repeat etc. (Ville)
- DP voltage swing function refactoring (José)
- WARN if max vswing/pre-emphasis violates the DP spec (Ville)
Other:
- Add new EHL PCI IDs (José)
- Unify struct intel_digital_port variable naming (Lucas)
- Various taint updates to aid debugging and improve CI (Michał Winiarski)
- Straggler conversions to new mmio register accessors (Daniele)
----------------------------------------------------------------
Abdiel Janulgue (2):
drm/i915/dg1: add initial DG-1 definitions
drm/i915/dg1: Add DG1 PCI IDs
Anshuman Gupta (1):
drm/i915/hdcp: Update CP as per the kernel internal state
Anusha Srivatsa (1):
drm/i915/dg1: Remove SHPD_FILTER_CNT register programming
Chris Wilson (22):
drm/i915/gem: Only revoke the GGTT mmappings on aperture detiling changes
drm/i915/gem: Only revoke mmap handlers if active
drm/i915/gem: Drop forced struct_mutex from shrinker_taints_mutex
drm/i915: Also drop vm.ref along error paths for vma construction
drm/i915/gem: Split the context's obj:vma lut into its own mutex
drm/i915: Export ppgtt_bind_vma
drm/i915/gt: Pin the rings before marking active
drm/i915: Update dma-attributes for our sg DMA
drm/i915/gem: Unpin idle contexts from kswapd reclaim
drm/i915/gt: Replace opencoded i915_gem_object_pin_map()
drm/i915: Release shortlived maps of longlived objects
drm/i915: Remove i915_gem_object_get_dirty_page()
drm/i915/gt: Optimise aliasing-ppgtt allocations
drm/i915/selftest: Check that GPR are restored across noa_wait
drm/i915/gt: Be defensive in the face of false CS events
drm/i915: Pull printing GT capabilities on error to err_print_gt
drm/i915/gt: Always reset the engine, even if inactive, on execlists failure
drm/i915/gt: Ignore irq enabling on the virtual engines
drm/i915/gt: Only swap to a random sibling once upon creation
drm/i915: Skip signaling a signaled request
drm/i915/gt: Trace placement of timeline HWSP
drm/i915/gt: Assert the kernel context is using the HWSP
Colin Ian King (1):
drm/i915/selftest: fix an error return path where err is not being set
Dan Carpenter (1):
drm/i915/selftest: Fix an error code in live_noa_gpr()
Daniele Ceraolo Spurio (8):
drm/i915: Convert device_info to uncore/de_read
drm/i915: Use the gt in HAS_ENGINE
drm/i915: Move engine-related mmio init to engines_init_mmio
drm/i915: Move the engine mask to intel_gt_info
drm/i915: Introduce gt_init_mmio
drm/i915/sseu: Move sseu detection and dump to intel_sseu
drm/i915: gt-fy sseu debugfs
drm/i915: Move sseu debugfs under gt/
Flavio Suligoi (1):
drm/i915: Fix spelling mistake in i915_reg.h
Jani Nikula (1):
drm/i915: Update DRIVER_DATE to 20200715
José Roberto de Souza (6):
drm/i915/display: Implement new combo phy initialization step
drm/i915/ehl: Add new PCI ids
drm/i915/tgl: Implement WAs 18011464164 and 22010931296
drm/i915/display: Replace drm_i915_private in voltage swing functions by intel_encoder
drm/i915/display: Remove port and phy from voltage swing functions
drm/i915/bios: Parse HOBL parameter
Lee Shawn C (1):
drm/i915/mst: filter out the display mode exceed sink's capability
Lucas De Marchi (4):
drm/i915/display: prefer dig_port to reference intel_digital_port
drm/i915: do not read swizzle info if unavailable
drm/i915/dg1: add support for the master unit interrupt
drm/i915/dg1: Add fake PCH
Lyude Paul (1):
drm/probe_helper: Add drm_connector_helper_funcs.mode_valid_ctx
Maarten Lankhorst (1):
drm/i915: Move cec_notifier to intel_hdmi_connector_unregister, v2.
Manasi Navare (2):
drm/i915/dp: Helper for checking DDI_BUF_CTL Idle status
drm/i915/dp: Helper to check for DDI BUF status to get active
Matt Atwood (1):
Revert "drm/i915/dp: Correctly advertise HBR3 for GEN11+"
Michał Winiarski (6):
drm/i915/guc: Expand guc_info debugfs with more information
drm/i915: Reboot CI if we get wedged during driver init
drm/i915: Print caller when tainting for CI
drm/i915: Don't taint when using fault injection
drm/i915/uc: Extract uc usage details into separate debugfs
drm/i915/huc: Adjust HuC state accordingly after GuC fetch error
Ramalingam C (1):
drm/i915/hdcp: Fix the return handling of drm_hdcp_check_ksvs_revoked
Stanislav Lisovskiy (1):
drm/i915/tgl: Clamp min_cdclk to max_cdclk_freq to unblock 8K
Stuart Summers (1):
drm/i915: Add has_master_unit_irq flag
Sudeep Holla (1):
drm/i915/selftests: Fix compare functions provided for sorting
Umesh Nerlige Ramappa (1):
drm/i915/perf: Use GTT when saving/restoring engine GPR
Venkata Sandeep Dhanalakota (1):
drm/i915/sseu: Move sseu_info under gt_info
Ville Syrjälä (16):
drm/i915/fbc: Use the correct plane stride
drm/i915/fbc: Fix nuke for pre-snb platforms
drm/i915/fbc: Enable fbc on i865
drm/i915/fbc: Allow FBC to recompress after a 3D workload on i85x/i865
drm/i915/sdvo: Fix SDVO colorimetry bit defines
drm/i915/sdvo: Implement limited color range for SDVO HDMI properly
drm/i915: Reject DRM_MODE_FLAG_DBLCLK with DVI sinks
drm/i915/sdvo: Make SDVO deal with HDMI pixel repeat
drm/i915/sdvo: Make .get_modes() return the number of modes
drm/i915/dvo: Make .get_modes() return the number of modes
drm/i915: Move all FBC w/as to .init_clock_gating()
drm/i915: Don't do WaFbcTurnOffFbcWatermark for glk
drm/i915: Limit WaFbcHighMemBwCorruptionAvoidance to skl and bxt
drm/i915: Document FBC related w/as more thoroughly
drm/i915: WARN if max vswing/pre-emphasis violates the DP spec
drm/i915: Recalculate FBC w/a stride when needed
YueHaibing (1):
drm/i915: Remove unused inline function drain_delayed_work()
drivers/gpu/drm/drm_crtc_helper_internal.h | 7 +-
drivers/gpu/drm/drm_probe_helper.c | 97 +--
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/display/intel_bios.c | 3 +
drivers/gpu/drm/i915/display/intel_cdclk.c | 11 +-
drivers/gpu/drm/i915/display/intel_combo_phy.c | 25 +
drivers/gpu/drm/i915/display/intel_ddi.c | 348 ++++++-----
drivers/gpu/drm/i915/display/intel_display.c | 12 +-
drivers/gpu/drm/i915/display/intel_display.h | 2 +-
.../gpu/drm/i915/display/intel_display_debugfs.c | 12 +-
drivers/gpu/drm/i915/display/intel_display_power.c | 4 +-
drivers/gpu/drm/i915/display/intel_display_types.h | 40 +-
drivers/gpu/drm/i915/display/intel_dp.c | 366 ++++++------
drivers/gpu/drm/i915/display/intel_dp.h | 4 +-
.../gpu/drm/i915/display/intel_dp_link_training.c | 9 +
drivers/gpu/drm/i915/display/intel_dp_mst.c | 129 ++--
drivers/gpu/drm/i915/display/intel_dp_mst.h | 6 +-
drivers/gpu/drm/i915/display/intel_dpio_phy.c | 38 +-
drivers/gpu/drm/i915/display/intel_dvo.c | 14 +-
drivers/gpu/drm/i915/display/intel_fbc.c | 98 +++-
drivers/gpu/drm/i915/display/intel_hdcp.c | 153 ++---
drivers/gpu/drm/i915/display/intel_hdmi.c | 277 +++++----
drivers/gpu/drm/i915/display/intel_hdmi.h | 6 +-
drivers/gpu/drm/i915/display/intel_lspcon.c | 8 +-
drivers/gpu/drm/i915/display/intel_lspcon.h | 2 +-
drivers/gpu/drm/i915/display/intel_psr.c | 4 +-
drivers/gpu/drm/i915/display/intel_sdvo.c | 145 +++--
drivers/gpu/drm/i915/display/intel_sdvo_regs.h | 8 +-
drivers/gpu/drm/i915/display/intel_vbt_defs.h | 1 +
drivers/gpu/drm/i915/display/intel_vdsc.c | 8 +-
drivers/gpu/drm/i915/gem/i915_gem_client_blt.c | 9 +-
drivers/gpu/drm/i915/gem/i915_gem_context.c | 18 +-
drivers/gpu/drm/i915/gem/i915_gem_context.h | 2 +-
drivers/gpu/drm/i915/gem/i915_gem_context_types.h | 1 +
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 22 +-
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 15 +-
drivers/gpu/drm/i915/gem/i915_gem_mman.h | 3 +-
drivers/gpu/drm/i915/gem/i915_gem_object.c | 41 +-
drivers/gpu/drm/i915/gem/i915_gem_object.h | 6 +-
drivers/gpu/drm/i915/gem/i915_gem_pages.c | 29 +-
drivers/gpu/drm/i915/gem/i915_gem_shrinker.c | 36 +-
drivers/gpu/drm/i915/gem/i915_gem_tiling.c | 2 +-
.../gpu/drm/i915/gem/selftests/i915_gem_context.c | 5 +-
drivers/gpu/drm/i915/gem/selftests/mock_context.c | 4 +-
drivers/gpu/drm/i915/gt/debugfs_gt.c | 2 +
drivers/gpu/drm/i915/gt/gen6_ppgtt.c | 22 +-
drivers/gpu/drm/i915/gt/gen7_renderclear.c | 2 +-
drivers/gpu/drm/i915/gt/intel_breadcrumbs.c | 7 +-
drivers/gpu/drm/i915/gt/intel_context.c | 12 +-
drivers/gpu/drm/i915/gt/intel_context_sseu.c | 2 +-
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 91 ++-
drivers/gpu/drm/i915/gt/intel_engine_pm.c | 1 +
drivers/gpu/drm/i915/gt/intel_engine_types.h | 4 +
drivers/gpu/drm/i915/gt/intel_engine_user.c | 2 +-
drivers/gpu/drm/i915/gt/intel_ggtt.c | 49 +-
drivers/gpu/drm/i915/gt/intel_gt.c | 18 +-
drivers/gpu/drm/i915/gt/intel_gt.h | 17 +-
drivers/gpu/drm/i915/gt/intel_gt_irq.c | 5 +-
drivers/gpu/drm/i915/gt/intel_gt_pm.c | 2 +-
drivers/gpu/drm/i915/gt/intel_gt_requests.c | 9 +-
drivers/gpu/drm/i915/gt/intel_gt_types.h | 11 +
drivers/gpu/drm/i915/gt/intel_gtt.h | 13 +-
drivers/gpu/drm/i915/gt/intel_lrc.c | 92 +--
drivers/gpu/drm/i915/gt/intel_ppgtt.c | 19 +-
drivers/gpu/drm/i915/gt/intel_renderstate.c | 2 +-
drivers/gpu/drm/i915/gt/intel_reset.c | 23 +-
drivers/gpu/drm/i915/gt/intel_reset.h | 10 +-
drivers/gpu/drm/i915/gt/intel_reset_types.h | 7 +-
drivers/gpu/drm/i915/gt/intel_ring_submission.c | 4 +-
drivers/gpu/drm/i915/gt/intel_rps.c | 3 +-
drivers/gpu/drm/i915/gt/intel_sseu.c | 591 ++++++++++++++++++-
drivers/gpu/drm/i915/gt/intel_sseu.h | 10 +-
drivers/gpu/drm/i915/gt/intel_sseu_debugfs.c | 306 ++++++++++
drivers/gpu/drm/i915/gt/intel_sseu_debugfs.h | 17 +
drivers/gpu/drm/i915/gt/intel_timeline.c | 7 +
drivers/gpu/drm/i915/gt/intel_workarounds.c | 21 +-
drivers/gpu/drm/i915/gt/selftest_lrc.c | 8 +-
drivers/gpu/drm/i915/gt/selftest_rc6.c | 2 +-
drivers/gpu/drm/i915/gt/selftest_rps.c | 8 +-
drivers/gpu/drm/i915/gt/selftest_timeline.c | 13 +-
drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 10 +-
drivers/gpu/drm/i915/gt/uc/intel_uc.c | 11 +-
drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.c | 29 +
drivers/gpu/drm/i915/gvt/handlers.c | 4 +-
drivers/gpu/drm/i915/gvt/interrupt.c | 2 +-
drivers/gpu/drm/i915/gvt/mmio_context.c | 2 +-
drivers/gpu/drm/i915/i915_debugfs.c | 286 +--------
drivers/gpu/drm/i915/i915_drv.c | 9 +-
drivers/gpu/drm/i915/i915_drv.h | 32 +-
drivers/gpu/drm/i915/i915_gem.h | 2 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +
drivers/gpu/drm/i915/i915_getparam.c | 2 +-
drivers/gpu/drm/i915/i915_gpu_error.c | 34 +-
drivers/gpu/drm/i915/i915_gpu_error.h | 3 +
drivers/gpu/drm/i915/i915_irq.c | 59 +-
drivers/gpu/drm/i915/i915_pci.c | 55 +-
drivers/gpu/drm/i915/i915_perf.c | 14 +-
drivers/gpu/drm/i915/i915_query.c | 2 +-
drivers/gpu/drm/i915/i915_reg.h | 18 +-
drivers/gpu/drm/i915/i915_request.c | 23 +-
drivers/gpu/drm/i915/i915_utils.c | 10 +
drivers/gpu/drm/i915/i915_utils.h | 16 +-
drivers/gpu/drm/i915/i915_vma.c | 24 +-
drivers/gpu/drm/i915/i915_vma_types.h | 1 -
drivers/gpu/drm/i915/intel_device_info.c | 653 +--------------------
drivers/gpu/drm/i915/intel_device_info.h | 16 +-
drivers/gpu/drm/i915/intel_pch.c | 6 +
drivers/gpu/drm/i915/intel_pch.h | 4 +
drivers/gpu/drm/i915/intel_pm.c | 108 +++-
drivers/gpu/drm/i915/intel_uncore.c | 20 +-
drivers/gpu/drm/i915/intel_uncore.h | 4 +-
drivers/gpu/drm/i915/selftests/i915_perf.c | 133 +++++
drivers/gpu/drm/i915/selftests/i915_request.c | 2 +-
drivers/gpu/drm/i915/selftests/mock_gem_device.c | 3 +-
drivers/gpu/drm/i915/selftests/mock_gtt.c | 12 +-
include/drm/drm_modeset_helper_vtables.h | 42 ++
include/drm/i915_pciids.h | 8 +
117 files changed, 2989 insertions(+), 2115 deletions(-)
create mode 100644 drivers/gpu/drm/i915/gt/intel_sseu_debugfs.c
create mode 100644 drivers/gpu/drm/i915/gt/intel_sseu_debugfs.h
--
Jani Nikula, Intel Open Source Graphics Center
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