== Series Details == Series: series starting with [01/23] Revert "drm/i915/gem: Async GPU relocations only" (rev2) URL : https://patchwork.freedesktop.org/series/79470/ State : warning == Summary == $ dim checkpatch origin/drm-tip 6a326d9f8985 Revert "drm/i915/gem: Async GPU relocations only" -:113: WARNING:MEMORY_BARRIER: memory barrier without comment #113: FILE: drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:1109: + mb(); -:161: WARNING:MEMORY_BARRIER: memory barrier without comment #161: FILE: drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:1157: + mb(); -:181: CHECK:SPACING: No space is necessary after a cast #181: FILE: drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:1177: + io_mapping_unmap_atomic((void __force __iomem *) unmask_page(cache->vaddr)); -:260: WARNING:MEMORY_BARRIER: memory barrier without comment #260: FILE: drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:1256: + mb(); -:274: CHECK:BRACES: Unbalanced braces around else statement #274: FILE: drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:1270: + } else total: 0 errors, 3 warnings, 2 checks, 455 lines checked 05d012e20b45 drm/i915: Revert relocation chaining commits. -:6: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #6: This reverts commit 964a9b0f611ee ("drm/i915/gem: Use chained reloc batches") -:221: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV) #221: FILE: drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:1313: + if (cache->rq_size > PAGE_SIZE/sizeof(u32) - (len + 1)) ^ total: 0 errors, 1 warnings, 1 checks, 281 lines checked a780c63bddfb Revert "drm/i915/gem: Drop relocation slowpath". -:131: WARNING:LINE_SPACING: Missing a blank line after declarations #131: FILE: drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:1705: + int err = __get_user(c, addr); + if (err) total: 0 errors, 1 warnings, 0 checks, 320 lines checked 48113ee8a844 drm/i915: Add an implementation for i915_gem_ww_ctx locking, v2. -:445: WARNING:LONG_LINE: line length of 103 exceeds 100 columns #445: FILE: drivers/gpu/drm/i915/i915_gem.c:1359: + while ((obj = list_first_entry_or_null(&ww->obj_list, struct drm_i915_gem_object, obj_link))) { total: 0 errors, 1 warnings, 0 checks, 441 lines checked 4aaec1db237b drm/i915: Remove locking from i915_gem_object_prepare_read/write 21fd5642515c drm/i915: Parse command buffer earlier in eb_relocate(slow) cfdfd2191f9e Revert "drm/i915/gem: Split eb_vma into its own allocation" a3f2b79bd1ce drm/i915: Use per object locking in execbuf, v12. -:457: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #457: FILE: drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:1410: +static int __reloc_entry_gpu(struct i915_execbuffer *eb, struct i915_vma *vma, -:477: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #477: FILE: drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:1483: +static int reloc_entry_gpu(struct i915_execbuffer *eb, struct i915_vma *vma, -:489: ERROR:TRAILING_WHITESPACE: trailing whitespace #489: FILE: drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:1508: +^I$ -:759: CHECK:MULTIPLE_ASSIGNMENTS: multiple assignments should be avoided #759: FILE: drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:2878: + eb.reloc_pool = eb.batch_pool = NULL; total: 1 errors, 0 warnings, 3 checks, 865 lines checked d4369286d54d drm/i915: Use ww locking in intel_renderstate. -:10: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #10: Convert to using ww-waiting, and make sure we always pin intel_context_state, total: 0 errors, 1 warnings, 0 checks, 190 lines checked 5eda6dc5378e drm/i915: Add ww context handling to context_barrier_task -:19: WARNING:LONG_LINE: line length of 109 exceeds 100 columns #19: FILE: drivers/gpu/drm/i915/gem/i915_gem_context.c:1097: + int (*pin)(struct intel_context *ce, struct i915_gem_ww_ctx *ww, void *data), total: 0 errors, 1 warnings, 0 checks, 146 lines checked ad64baa191f1 drm/i915: Nuke arguments to eb_pin_engine 402f556b79e3 drm/i915: Pin engine before pinning all objects, v5. 60c31ab26acd drm/i915: Rework intel_context pinning to do everything outside of pin_mutex -:125: CHECK:LINE_SPACING: Please don't use multiple blank lines #125: FILE: drivers/gpu/drm/i915/gt/intel_context.c:176: + + -:338: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #338: FILE: drivers/gpu/drm/i915/gt/intel_lrc.c:3483: + *vaddr = i915_gem_object_pin_map(ce->state->obj, + i915_coherent_map_type(ce->engine->i915) | total: 0 errors, 0 warnings, 2 checks, 434 lines checked af579dfca323 drm/i915: Make sure execbuffer always passes ww state to i915_vma_pin. -:95: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #95: FILE: drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:595: + err = i915_vma_pin_ww(vma, &eb->ww, entry->pad_to_size, entry->alignment, -:213: WARNING:BLOCK_COMMENT_STYLE: Block comments use a trailing */ on a separate line #213: FILE: drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:2400: + * hsw should have this fixed, but bdw mucks it up again. */ total: 0 errors, 1 warnings, 1 checks, 863 lines checked 3cb997208f2d drm/i915: Convert i915_gem_object/client_blt.c to use ww locking as well, v2. 5fc455841210 drm/i915: Kill last user of intel_context_create_request outside of selftests 75f8204d2ad4 drm/i915: Convert i915_perf to ww locking as well cf3cf9931dba drm/i915: Dirty hack to fix selftests locking inversion 86024c0ea90a drm/i915/selftests: Fix locking inversion in lrc selftest. b8487041fc65 drm/i915: Use ww pinning for intel_context_create_request() a58c03e5e04a drm/i915: Move i915_vma_lock in the selftests to avoid lock inversion, v2. 896faff1a7f2 drm/i915: Add ww locking to vm_fault_gtt -:7: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one total: 0 errors, 1 warnings, 0 checks, 91 lines checked b4c67068c47a drm/i915: Add ww locking to pin_to_display_plane -:7: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one total: 0 errors, 1 warnings, 0 checks, 129 lines checked _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
