On Fri, 10 Jul 2020 01:37:07 +0800 Fred Gao <fred.gao@xxxxxxxxx> wrote: > Bypass the IGD initialization for Intel's dgfx devices with own expansion > ROM and the host/LPC bridge config space are no longer accessed. > > Cc: Zhenyu Wang <zhenyuw@xxxxxxxxxxxxxxx> > Cc: Xiong Zhang <xiong.y.zhang@xxxxxxxxx> > Cc: Hang Yuan <hang.yuan@xxxxxxxxxxxxxxx> > Cc: Stuart Summers <stuart.summers@xxxxxxxxx> > Signed-off-by: Lucas De Marchi <lucas.demarchi@xxxxxxxxx> > Signed-off-by: Fred Gao <fred.gao@xxxxxxxxx> > --- > drivers/vfio/pci/vfio_pci.c | 11 ++++++++++- > 1 file changed, 10 insertions(+), 1 deletion(-) > > diff --git a/drivers/vfio/pci/vfio_pci.c b/drivers/vfio/pci/vfio_pci.c > index f634c81998bb..0f4a34849836 100644 > --- a/drivers/vfio/pci/vfio_pci.c > +++ b/drivers/vfio/pci/vfio_pci.c > @@ -28,6 +28,8 @@ > #include <linux/nospec.h> > #include <linux/sched/mm.h> > > +#include <drm/i915_pciids.h> > + > #include "vfio_pci_private.h" > > #define DRIVER_VERSION "0.2" > @@ -60,6 +62,12 @@ module_param(enable_sriov, bool, 0644); > MODULE_PARM_DESC(enable_sriov, "Enable support for SR-IOV configuration. Enabling SR-IOV on a PF typically requires support of the userspace PF driver, enabling VFs without such support may result in non-functional VFs or PF."); > #endif > > +/* Intel's dgfx is not IGD, so don't handle them the same way */ > +static const struct pci_device_id intel_dgfx_pciids[] = { > + INTEL_DG1_IDS(0), > + { } > +}; > + > static inline bool vfio_vga_disabled(void) > { > #ifdef CONFIG_VFIO_PCI_VGA > @@ -339,7 +347,8 @@ static int vfio_pci_enable(struct vfio_pci_device *vdev) > > if (vfio_pci_is_vga(pdev) && > pdev->vendor == PCI_VENDOR_ID_INTEL && > - IS_ENABLED(CONFIG_VFIO_PCI_IGD)) { > + IS_ENABLED(CONFIG_VFIO_PCI_IGD) && > + !pci_match_id(intel_dgfx_pciids, pdev)) { > ret = vfio_pci_igd_init(vdev); > if (ret) { > pci_warn(pdev, "Failed to setup Intel IGD regions\n"); Do we need to maintain specific IDs or could we simply test whether the device is on the root bus to determine if it is integrated or discrete? A discrete device should be connected to a downstream port rather than appear on the root bus. Thanks, Alex _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx