The datasheet specifies that programming the base_unit part of the ctrl register to 0 results in a contineous low signal. Adjust the get_state method to reflect this by setting pwm_state.period to 1 and duty_cycle to 0. Suggested-by: Uwe Kleine-König <u.kleine-koenig@xxxxxxxxxxxxxx> Signed-off-by: Hans de Goede <hdegoede@xxxxxxxxxx> --- Changes in v4: - This is a new patch in v4 of this patchset --- drivers/pwm/pwm-lpss.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/pwm/pwm-lpss.c b/drivers/pwm/pwm-lpss.c index 4f3d60ce9929..4d4de45cf99b 100644 --- a/drivers/pwm/pwm-lpss.c +++ b/drivers/pwm/pwm-lpss.c @@ -192,14 +192,16 @@ static void pwm_lpss_get_state(struct pwm_chip *chip, struct pwm_device *pwm, freq = base_unit * lpwm->info->clk_rate; do_div(freq, base_unit_range); - if (freq == 0) - state->period = NSEC_PER_SEC; - else + if (freq == 0) { + /* In this case the PWM outputs a continous low signal */ + state->period = 1; + state->duty_cycle = 0; + } else { state->period = NSEC_PER_SEC / (unsigned long)freq; - - on_time_div *= state->period; - do_div(on_time_div, 255); - state->duty_cycle = on_time_div; + on_time_div *= state->period; + do_div(on_time_div, 255); + state->duty_cycle = on_time_div; + } state->polarity = PWM_POLARITY_NORMAL; state->enabled = !!(ctrl & PWM_ENABLE); -- 2.26.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx