On Thu, Jul 02, 2020 at 12:27:42PM -0700, Manasi Navare wrote:
> On Thu, Jul 02, 2020 at 09:24:50PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> >
> > Currently we claim to use TPS7 when using TPS4. That is just
> > confusing, so let's fix the debug print.
> >
> > And while we're touching this let's add the customary
> > encoder id/name as well.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> > ---
> > drivers/gpu/drm/i915/display/intel_dp.c | 26 ++++++++++++++++++++-----
> > 1 file changed, 21 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > index 5ac182357fc9..eba97b1f5839 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -4353,17 +4353,33 @@ void intel_dp_set_signal_levels(struct intel_dp *intel_dp)
> > intel_dp->set_signal_levels(intel_dp);
> > }
> >
> > +static char dp_training_pattern_name(u8 train_pat)
> > +{
> > + switch (train_pat) {
> > + case DP_TRAINING_PATTERN_1:
> > + case DP_TRAINING_PATTERN_2:
> > + case DP_TRAINING_PATTERN_3:
> > + return '0' + train_pat;
> > + case DP_TRAINING_PATTERN_4:
> > + return '4';
> > + default:
> > + return '?';
>
> Shouldnt this be a WARN? If we just return a ? it might result into failure without any warn
Only if decide that this functions's purpose is to validate the rest of
the code isn't broken and using bogus training patterns.
>
> Other than that I like that now it will say TPS4 instead of misleading TPS7
> So with a default WARN,
>
> Reviewed-by: Manasi Navare <manasi.d.navare@xxxxxxxxx>
>
> Manasi
>
> > + }
> > +}
> > +
> > void
> > intel_dp_program_link_training_pattern(struct intel_dp *intel_dp,
> > u8 dp_train_pat)
> > {
> > - struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > - u8 train_pat_mask = drm_dp_training_pattern_mask(intel_dp->dpcd);
> > + struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> > + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> > + u8 train_pat = dp_train_pat & drm_dp_training_pattern_mask(intel_dp->dpcd);
> >
> > - if (dp_train_pat & train_pat_mask)
> > + if (train_pat)
> > drm_dbg_kms(&dev_priv->drm,
> > - "Using DP training pattern TPS%d\n",
> > - dp_train_pat & train_pat_mask);
> > + "[ENCODER:%d:%s] Using DP training pattern TPS%c\n",
> > + encoder->base.base.id, encoder->base.name,
> > + dp_training_pattern_name(train_pat));
> >
> > intel_dp->set_link_train(intel_dp, dp_train_pat);
> > }
> > --
> > 2.26.2
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel
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