Since gen8 we don't use swizzle anymore. Don't dump registers related to
it: registers may or may not be there.
v2: pull the rest of driver state reporting before the read out (Chris)
Cc: Matt Roper <matthew.d.roper@xxxxxxxxx>
Signed-off-by: Lucas De Marchi <lucas.demarchi@xxxxxxxxx>
---
drivers/gpu/drm/i915/i915_debugfs.c | 14 +++++++++-----
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 9ca94a435b75..94ed442910d6 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1138,13 +1138,20 @@ static int i915_swizzle_info(struct seq_file *m, void *data)
struct intel_uncore *uncore = &dev_priv->uncore;
intel_wakeref_t wakeref;
- wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
-
seq_printf(m, "bit6 swizzle for X-tiling = %s\n",
swizzle_string(dev_priv->ggtt.bit_6_swizzle_x));
seq_printf(m, "bit6 swizzle for Y-tiling = %s\n",
swizzle_string(dev_priv->ggtt.bit_6_swizzle_y));
+ if (dev_priv->quirks & QUIRK_PIN_SWIZZLED_PAGES)
+ seq_puts(m, "L-shaped memory detected\n");
+
+ /* On BDW+, swizzling is not used. See detect_bit_6_swizzle() */
+ if (INTEL_GEN(dev_priv) >= 8 || IS_VALLEYVIEW(dev_priv))
+ return 0;
+
+ wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
+
if (IS_GEN_RANGE(dev_priv, 3, 4)) {
seq_printf(m, "DDC = 0x%08x\n",
intel_uncore_read(uncore, DCC));
@@ -1173,9 +1180,6 @@ static int i915_swizzle_info(struct seq_file *m, void *data)
intel_uncore_read(uncore, DISP_ARB_CTL));
}
- if (dev_priv->quirks & QUIRK_PIN_SWIZZLED_PAGES)
- seq_puts(m, "L-shaped memory detected\n");
-
intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
return 0;
--
2.26.2
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