== Series Details == Series: Introduce DG1 (rev3) URL : https://patchwork.freedesktop.org/series/77496/ State : warning == Summary == $ dim checkpatch origin/drm-tip 988d01bfbd82 drm/i915: Add has_master_unit_irq flag 241025556ca5 drm/i915/dg1: add initial DG-1 definitions -:41: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'p' - possible side-effects? #41: FILE: drivers/gpu/drm/i915/i915_drv.h:1565: +#define IS_DG1_REVID(p, since, until) \ + (IS_DG1(p) && IS_REVID(p, since, until)) total: 0 errors, 0 warnings, 1 checks, 53 lines checked c6bda5d540fd drm/i915/dg1: Add DG1 PCI IDs e24161cc3641 drm/i915/dg1: add support for the master unit interrupt 6a75112b7aed drm/i915/dg1: Remove SHPD_FILTER_CNT register programming c34b0b236cf6 drm/i915/dg1: Add fake PCH cf65ad570c8c drm/i915/dg1: Initialize RAWCLK properly fedac7296bd4 drm/i915/dg1: Define MOCS table for DG1 322b9085eff2 drm/i915/dg1: Add DG1 power wells 5286f7943bfa drm/i915/dg1: Increase mmio size to 4MB 4aa9f50249e2 drm/i915/dg1: Wait for pcode/uncore handshake at startup c62a0b547629 drm/i915/dg1: Add DPLL macros for DG1 82d28e83c02c drm/i915/dg1: Add and setup DPLLs for DG1 c1bd97f322b5 drm/i915/dg1: Enable DPLL for DG1 29d541db7fa4 drm/i915/dg1: add hpd interrupt handling bebd570390ca drm/i915/dg1: invert HPD pins dc4378f76bda drm/i915/dg1: gmbus pin mapping 28762e8057ef drm/i915/dg1: Enable first 2 ports for DG1 d9fee22a3149 drm/i915/dg1: Don't program PHY_MISC for PHY-C and PHY-D e9d9d678ccbb drm/i915/dg1: Update comp master/slave relationships for PHYs b94b0daa426b drm/i915/dg1: Update voltage swing tables for DP f3a63ae610cb drm/i915/dg1: provide port/phy mapping for vbt 6d2de4a643ed drm/i915/dg1: map/unmap pll clocks -:244: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'phy' - possible side-effects? #244: FILE: drivers/gpu/drm/i915/i915_reg.h:10305: +#define DG1_DPCLKA_CFGCR0_DDI_CLK_SEL_VAL_TO_ID(val, phy) \ + ((((val) & DG1_DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(phy)) >> ((phy % 2) * 2)) + (2 * (phy / 2))) total: 0 errors, 0 warnings, 1 checks, 204 lines checked 0b374a4ce084 drm/i915/dg1: enable PORT C/D aka D/E f4b22e8c57b9 drm/i915/dg1: Load DMC 352b53d3a545 drm/i915/rkl: Add initial workarounds 52c58ad484ed drm/i915/dg1: Add initial DG1 workarounds 9f3c06617494 drm/i915/dg1: DG1 does not support DC6 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
