On Tue, Jun 30, 2020 at 04:33:10PM -0700, Matt Atwood wrote: > intel_dp_set_source_rates() calls intel_dp_is_edp(), which is unsafe to > use before encoder_type is set. This caused GEN11+ to incorrectly strip > HBR3 from source rates for edp. Move intel_dp_set_source_rates() to > after encoder_type is set. Add comment to intel_dp_is_edp() describing > unsafe usages. > > v2: Alter intel_dp_set_source_rates final position (Ville/Manasi). > Remove outdated comment (Ville). > Slight optimization of control flow in intel_dp_init_connector. > Slight rewording in commit message. > > Signed-off-by: Matt Atwood <matthew.s.atwood@xxxxxxxxx> lgtm Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/display/intel_dp.c | 28 ++++++++++--------------- > 1 file changed, 11 insertions(+), 17 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c > index 3df5d901dd9d..c9b93c5706af 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -137,6 +137,8 @@ static const u8 valid_dsc_slicecount[] = {1, 2, 4}; > * > * If a CPU or PCH DP output is attached to an eDP panel, this function > * will return true, and false otherwise. > + * > + * This function is not safe to use prior to encoder type being set. > */ > bool intel_dp_is_edp(struct intel_dp *intel_dp) > { > @@ -8157,8 +8159,6 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port, > intel_encoder->base.name)) > return false; > > - intel_dp_set_source_rates(intel_dp); > - > intel_dp->reset_link_params = true; > intel_dp->pps_pipe = INVALID_PIPE; > intel_dp->active_pipe = INVALID_PIPE; > @@ -8174,28 +8174,22 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port, > */ > drm_WARN_ON(dev, intel_phy_is_tc(dev_priv, phy)); > type = DRM_MODE_CONNECTOR_eDP; > + intel_encoder->type = INTEL_OUTPUT_EDP; > + > + /* eDP only on port B and/or C on vlv/chv */ > + if (drm_WARN_ON(dev, (IS_VALLEYVIEW(dev_priv) || > + IS_CHERRYVIEW(dev_priv)) && > + port != PORT_B && port != PORT_C)) > + return false; > } else { > type = DRM_MODE_CONNECTOR_DisplayPort; > } > > + intel_dp_set_source_rates(intel_dp); > + > if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) > intel_dp->active_pipe = vlv_active_pipe(intel_dp); > > - /* > - * For eDP we always set the encoder type to INTEL_OUTPUT_EDP, but > - * for DP the encoder type can be set by the caller to > - * INTEL_OUTPUT_UNKNOWN for DDI, so don't rewrite it. > - */ > - if (type == DRM_MODE_CONNECTOR_eDP) > - intel_encoder->type = INTEL_OUTPUT_EDP; > - > - /* eDP only on port B and/or C on vlv/chv */ > - if (drm_WARN_ON(dev, (IS_VALLEYVIEW(dev_priv) || > - IS_CHERRYVIEW(dev_priv)) && > - intel_dp_is_edp(intel_dp) && > - port != PORT_B && port != PORT_C)) > - return false; > - > drm_dbg_kms(&dev_priv->drm, > "Adding %s connector on [ENCODER:%d:%s]\n", > type == DRM_MODE_CONNECTOR_eDP ? "eDP" : "DP", > -- > 2.21.3 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx