On Wed, Jul 01, 2020 at 12:20:26AM +0300, Ville Syrjälä wrote: > On Fri, Jun 26, 2020 at 04:26:41PM -0700, Manasi Navare wrote: > > Based on the platform, Bspec expects us to wait or poll with > > timeout for DDI BUF IDLE bit to be set to 0 (non idle) or get active > > after enabling DDI_BUF_CTL. > > > > v4: > > * Use the timeout for GLK (Ville) > > v3: > > * Add a new function _active for DDI BUF CTL to be non idle (Ville) > > v2: > > * Based on platform, fixed delay or poll (Ville) > > * Use a helper to do this (Imre, Ville) > > > > Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Cc: Imre Deak <imre.deak@xxxxxxxxx> > > Signed-off-by: Manasi Navare <manasi.d.navare@xxxxxxxxx> > > --- > > drivers/gpu/drm/i915/display/intel_ddi.c | 16 +++++++++++++++- > > 1 file changed, 15 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c > > index 052a74625a61..94d57b57139b 100644 > > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > > @@ -1195,6 +1195,20 @@ static void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv, > > port_name(port)); > > } > > > > +static void intel_wait_ddi_buf_active(struct drm_i915_private *dev_priv, > > + enum port port) > > +{ > > + if (INTEL_GEN(dev_priv) < 10 && !IS_GEMINILAKE(dev_priv) ) { > > + usleep_range(600, 1000); > > I would probably put a spec quote here to make it clear what this is: > "Wait >518 us for buffers to enable..." > > Or we could s/600/518/ to make it easier to figure out. But that could > be a followup. Yes I can change this to 518,1000 and add a comment in the next rev > > > + return; > > + } > > + > > + if (wait_for_us(!(intel_de_read(dev_priv, DDI_BUF_CTL(port)) & > > + DDI_BUF_IS_IDLE), 600)) > > Spec says 500 usec for this. Is there a reason to not go with the spec > value? I guess one argument is that we didn't do it before. But I'd > probably change it, if not in this patch then as a followup. Hmm yes probably the HSDs said 600 but since spec says 500usecs, I will change the timeout to 500 Manasi > > > + drm_err(&dev_priv->drm, "Timeout waiting for DDI BUF %c to get active\n", > > + port_name(port)); > > +} > > + > > static u32 hsw_pll_to_ddi_pll_sel(const struct intel_shared_dpll *pll) > > { > > switch (pll->info->id) { > > @@ -4020,7 +4034,7 @@ static void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp) > > intel_de_write(dev_priv, DDI_BUF_CTL(port), intel_dp->DP); > > intel_de_posting_read(dev_priv, DDI_BUF_CTL(port)); > > > > - udelay(600); > > + intel_wait_ddi_buf_active(dev_priv, port); > > Still can't see fdi anywhere. > > Whatever > Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > > } > > > > static void intel_ddi_set_link_train(struct intel_dp *intel_dp, > > -- > > 2.19.1 > > -- > Ville Syrjälä > Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx