On 6/26/20 12:14 AM, Lucas De Marchi wrote:
Cc Matt and Daniele
On Thu, Jun 25, 2020 at 9:38 PM Dave Airlie <airlied@xxxxxxxxx> wrote:
I can't figure this out easily so I'd thought I'd just ask, but does
DG1 have VRAM > PCIE aperture, I'm not sure I've see any mention of
We'd need to go via lmem since there's no mappable aperture. There are
a few patches in tree for that
(see e.g. 54b512cd7a6d ("drm/i915: do not map aperture if it is not
available.")) but more missing.
To clarify, although the legacy aperture mapping that allowed the CPU to
access memory via the GGTT for swizzling is gone, VRAM/LMEM is still
cpu-mappable via pci bar.
Will leave the questions about possible trashing to Matt as he's more
familiar than me with how this works.
Daniele
Lucas De Marchi
mappable VRAM vs non-mappable in patches, is it planned to just thrash
the aperture if userspace ever ties to map too much of it.
Are pagetables stored in the visible RAM space?
Dave.
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