Doing this rename to match with other registers and avoid name clash
in case other register has the same name.
Signed-off-by: José Roberto de Souza <jose.souza@xxxxxxxxx>
---
drivers/gpu/drm/i915/display/intel_combo_phy.c | 14 ++++++++------
drivers/gpu/drm/i915/i915_reg.h | 2 +-
2 files changed, 9 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_combo_phy.c b/drivers/gpu/drm/i915/display/intel_combo_phy.c
index 9eba6e59fff3..38496d2e37fc 100644
--- a/drivers/gpu/drm/i915/display/intel_combo_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_combo_phy.c
@@ -129,7 +129,7 @@ static bool cnl_verify_procmon_ref_values(struct drm_i915_private *dev_priv,
static bool cnl_combo_phy_enabled(struct drm_i915_private *dev_priv)
{
return !(intel_de_read(dev_priv, CHICKEN_MISC_2) & CNL_COMP_PWR_DOWN) &&
- (intel_de_read(dev_priv, CNL_PORT_COMP_DW0) & COMP_INIT);
+ (intel_de_read(dev_priv, CNL_PORT_COMP_DW0) & CNL_PORT_COMP_DW0_COMP_INIT);
}
static bool cnl_combo_phy_verify_state(struct drm_i915_private *dev_priv)
@@ -160,7 +160,7 @@ static void cnl_combo_phys_init(struct drm_i915_private *dev_priv)
cnl_set_procmon_ref_values(dev_priv, PHY_A);
val = intel_de_read(dev_priv, CNL_PORT_COMP_DW0);
- val |= COMP_INIT;
+ val |= CNL_PORT_COMP_DW0_COMP_INIT;
intel_de_write(dev_priv, CNL_PORT_COMP_DW0, val);
val = intel_de_read(dev_priv, CNL_PORT_CL1CM_DW5);
@@ -198,13 +198,15 @@ static bool has_phy_misc(struct drm_i915_private *i915, enum phy phy)
static bool icl_combo_phy_enabled(struct drm_i915_private *dev_priv,
enum phy phy)
{
+ const u32 val = intel_de_read(dev_priv, ICL_PORT_COMP_DW0(phy));
+
/* The PHY C added by EHL has no PHY_MISC register */
if (!has_phy_misc(dev_priv, phy))
- return intel_de_read(dev_priv, ICL_PORT_COMP_DW0(phy)) & COMP_INIT;
+ return val & CNL_PORT_COMP_DW0_COMP_INIT;
else
return !(intel_de_read(dev_priv, ICL_PHY_MISC(phy)) &
ICL_PHY_MISC_DE_IO_COMP_PWR_DOWN) &&
- (intel_de_read(dev_priv, ICL_PORT_COMP_DW0(phy)) & COMP_INIT);
+ (val & CNL_PORT_COMP_DW0_COMP_INIT);
}
static bool ehl_vbt_ddi_d_present(struct drm_i915_private *i915)
@@ -388,7 +390,7 @@ static void icl_combo_phys_init(struct drm_i915_private *dev_priv)
}
val = intel_de_read(dev_priv, ICL_PORT_COMP_DW0(phy));
- val |= COMP_INIT;
+ val |= CNL_PORT_COMP_DW0_COMP_INIT;
intel_de_write(dev_priv, ICL_PORT_COMP_DW0(phy), val);
val = intel_de_read(dev_priv, ICL_PORT_CL_DW5(phy));
@@ -448,7 +450,7 @@ static void icl_combo_phys_uninit(struct drm_i915_private *dev_priv)
skip_phy_misc:
val = intel_de_read(dev_priv, ICL_PORT_COMP_DW0(phy));
- val &= ~COMP_INIT;
+ val &= ~CNL_PORT_COMP_DW0_COMP_INIT;
intel_de_write(dev_priv, ICL_PORT_COMP_DW0(phy), val);
}
}
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index dbbe20a38345..6938f4d251ae 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1909,7 +1909,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
#define CNL_PORT_COMP_DW0 _MMIO(0x162100)
#define ICL_PORT_COMP_DW0(phy) _MMIO(_ICL_PORT_COMP_DW(0, phy))
-#define COMP_INIT REG_BIT(31)
+#define CNL_PORT_COMP_DW0_COMP_INIT REG_BIT(31)
#define ICL_PORT_COMP_DW0_GRCCODE_LDO_MASK REG_GENMASK(7, 0)
#define CNL_PORT_COMP_DW1 _MMIO(0x162104)
--
2.27.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
