This is an initial set of patches for enabling VRR support in i915. This series has patches for: 1. adding a drm dpcd helper to read ignore MSA bit in sink's DPCD indicating sink support for VRR 2. Attach and set VRR capable connector prop for Intel DP conn 3. Expose VRR min and max through debugfs Aditya Swarup (1): drm/i915/dp: Attach and set drm connector VRR property Bhanuprakash Modem (1): drm/debug: Expose connector VRR monitor range via debugfs Manasi Navare (1): drm/dp: DRM DP helper for reading Ignore MSA from DPCD .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 20 -------------- drivers/gpu/drm/drm_debugfs.c | 22 +++++++++++++++ drivers/gpu/drm/i915/display/intel_dp.c | 27 +++++++++++++++++++ drivers/gpu/drm/i915/display/intel_dp.h | 2 ++ include/drm/drm_dp_helper.h | 8 ++++++ 5 files changed, 59 insertions(+), 20 deletions(-) -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
