On Tue, Jun 16, 2020 at 12:30:56PM -0700, Manasi Navare wrote: > The Bspec sequence expects us to poll for DDI Idle status > to be 0 (not idle) with a timeout of 600usecs after enabling the > DDI BUF CTL. But currently in the driver we just wait for 600usecs > without polling so add that. > > Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > Cc: Imre Deak <imre.deak@xxxxxxxxx> > Signed-off-by: Manasi Navare <manasi.d.navare@xxxxxxxxx> > --- > drivers/gpu/drm/i915/display/intel_ddi.c | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c > index ca7bb2294d2b..de7e15de0bc5 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > @@ -4023,7 +4023,11 @@ static void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp) > intel_de_write(dev_priv, DDI_BUF_CTL(port), intel_dp->DP); > intel_de_posting_read(dev_priv, DDI_BUF_CTL(port)); > > - udelay(600); > + if (wait_for_us(!(intel_de_read(dev_priv, DDI_BUF_CTL(port)) & > + DDI_BUF_IS_IDLE), > + 600)) > + drm_err(&dev_priv->drm, "DDI port:%c buffer idle\n", > + port_name(port)); Another thing I just noticed is that icl+ need this for HDMI as well. The slightly odd thing is that glk is documented to need this for DP but not HDMI. But I'm thinking doing it also for glk HDMI should be fine. So I guess to line up with the spec we should: - fixed >518us enable delay for pre-glk (not sure if polling would be ok for hsw/bdw/skl) - poll for enable on glk+ - fixed 16us disable delay for bxt - poll for disable on !bxt And do it for both DP and HDMI for consistency. > } > > static void intel_ddi_set_link_train(struct intel_dp *intel_dp, > -- > 2.19.1 -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
