On Tue, Jun 16, 2020 at 05:18:54PM +0300, Imre Deak wrote: > During encoder enabling we clear the flag before starting the ACT > sequence and wait for the flag, but the clearing is missing during > encoder disabling, add it there too. Since nothing cleared the flag > automatically we could've run subsequent disabling steps too early. > > Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx> Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c > index b66b56a070e5..9308b5920780 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c > @@ -389,6 +389,8 @@ static void intel_mst_post_disable_dp(struct intel_atomic_state *state, > > drm_dp_update_payload_part2(&intel_dp->mst_mgr); > > + clear_act_sent(intel_dp); > + > val = intel_de_read(dev_priv, > TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder)); > val &= ~TRANS_DDI_DP_VC_PAYLOAD_ALLOC; > -- > 2.23.1 -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
