Looks good to me. Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@xxxxxxxxx> On Wed, 2020-05-20 at 14:27 -0700, José Roberto de Souza wrote: > This parameter is meant to be used when PSR issues are found as some > issues in the past was due wrong values set in VBT so this would be > a quick and easy way to ask users or for us to check if the issue is > due VBT values. > > Cc: Gwan-gyeong Mun <gwan-gyeong.mun@xxxxxxxxx> > Signed-off-by: José Roberto de Souza <jose.souza@xxxxxxxxx> > --- > drivers/gpu/drm/i915/display/intel_psr.c | 37 ++++++++++++++++++-- > ---- > drivers/gpu/drm/i915/i915_params.c | 5 ++++ > drivers/gpu/drm/i915/i915_params.h | 1 + > 3 files changed, 34 insertions(+), 9 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c > b/drivers/gpu/drm/i915/display/intel_psr.c > index b7a2c102648a..859780853f42 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.c > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > @@ -426,6 +426,12 @@ static u32 intel_psr1_get_tp_time(struct > intel_dp *intel_dp) > if (INTEL_GEN(dev_priv) >= 11) > val |= EDP_PSR_TP4_TIME_0US; > > + if (i915_modparams.psr_safest_params) { > + val |= EDP_PSR_TP1_TIME_2500us; > + val |= EDP_PSR_TP2_TP3_TIME_2500us; > + goto check_tp3_sel; > + } > + > if (dev_priv->vbt.psr.tp1_wakeup_time_us == 0) > val |= EDP_PSR_TP1_TIME_0us; > else if (dev_priv->vbt.psr.tp1_wakeup_time_us <= 100) > @@ -444,6 +450,7 @@ static u32 intel_psr1_get_tp_time(struct intel_dp > *intel_dp) > else > val |= EDP_PSR_TP2_TP3_TIME_2500us; > > +check_tp3_sel: > if (intel_dp_source_supports_hbr2(intel_dp) && > drm_dp_tps3_supported(intel_dp->dpcd)) > val |= EDP_PSR_TP1_TP3_SEL; > @@ -495,18 +502,13 @@ static void hsw_activate_psr1(struct intel_dp > *intel_dp) > intel_de_write(dev_priv, EDP_PSR_CTL(dev_priv->psr.transcoder), > val); > } > > -static void hsw_activate_psr2(struct intel_dp *intel_dp) > +static u32 intel_psr2_get_tp_time(struct intel_dp *intel_dp) > { > struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); > - u32 val; > - > - val = psr_compute_idle_frames(intel_dp) << > EDP_PSR2_IDLE_FRAME_SHIFT; > - > - val |= EDP_PSR2_ENABLE | EDP_SU_TRACK_ENABLE; > - if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) > - val |= EDP_Y_COORDINATE_ENABLE; > + u32 val = 0; > > - val |= EDP_PSR2_FRAME_BEFORE_SU(dev_priv->psr.sink_sync_latency > + 1); > + if (i915_modparams.psr_safest_params) > + return EDP_PSR2_TP2_TIME_2500us; > > if (dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us >= 0 && > dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us <= 50) > @@ -518,6 +520,23 @@ static void hsw_activate_psr2(struct intel_dp > *intel_dp) > else > val |= EDP_PSR2_TP2_TIME_2500us; > > + return val; > +} > + > +static void hsw_activate_psr2(struct intel_dp *intel_dp) > +{ > + struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); > + u32 val; > + > + val = psr_compute_idle_frames(intel_dp) << > EDP_PSR2_IDLE_FRAME_SHIFT; > + > + val |= EDP_PSR2_ENABLE | EDP_SU_TRACK_ENABLE; > + if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) > + val |= EDP_Y_COORDINATE_ENABLE; > + > + val |= EDP_PSR2_FRAME_BEFORE_SU(dev_priv->psr.sink_sync_latency > + 1); > + val |= intel_psr2_get_tp_time(intel_dp); > + > /* > * PSR2 HW is incorrectly using EDP_PSR_TP1_TP3_SEL and BSpec > is > * recommending keep this bit unset while PSR2 is enabled. > diff --git a/drivers/gpu/drm/i915/i915_params.c > b/drivers/gpu/drm/i915/i915_params.c > index add00ec1f787..307e4667fc62 100644 > --- a/drivers/gpu/drm/i915/i915_params.c > +++ b/drivers/gpu/drm/i915/i915_params.c > @@ -88,6 +88,11 @@ i915_param_named_unsafe(enable_psr, int, 0600, > "(0=disabled, 1=enabled) " > "Default: -1 (use per-chip default)"); > > +i915_param_named(psr_safest_params, bool, 0400, > + "Replace PSR VBT parameters by the safest and not optimal ones. > This " > + "is helpfull to detect if PSR issues are related to bad values > set in " > + " VBT. (0=use VBT paramters, 1=use safest parameters)"); > + > i915_param_named_unsafe(force_probe, charp, 0400, > "Force probe the driver for specified devices. " > "See CONFIG_DRM_I915_FORCE_PROBE for details."); > diff --git a/drivers/gpu/drm/i915/i915_params.h > b/drivers/gpu/drm/i915/i915_params.h > index 45323732f099..2a99c908c7c8 100644 > --- a/drivers/gpu/drm/i915/i915_params.h > +++ b/drivers/gpu/drm/i915/i915_params.h > @@ -53,6 +53,7 @@ struct drm_printer; > param(int, enable_dc, -1, 0400) \ > param(int, enable_fbc, -1, 0600) \ > param(int, enable_psr, -1, 0600) \ > + param(bool, psr_safest_params, false, 0600) \ > param(int, disable_power_well, -1, 0400) \ > param(int, enable_ips, 1, 0600) \ > param(int, invert_brightness, 0, 0600) \ _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx