Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes:
> Allow batch buffers to read their own _local_ cumulative HW runtime of
> their logical context.
>
> Fixes: 0f2f39758341 ("drm/i915: Add gen9 BCS cmdparsing")
> Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
> Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx>
> Cc: <stable@xxxxxxxxxxxxxxx> # v5.4+
Reviewed-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_cmd_parser.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
> index 189b573d02be..372354d33f55 100644
> --- a/drivers/gpu/drm/i915/i915_cmd_parser.c
> +++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
> @@ -572,6 +572,9 @@ struct drm_i915_reg_descriptor {
> #define REG32(_reg, ...) \
> { .addr = (_reg), __VA_ARGS__ }
>
> +#define REG32_IDX(_reg, idx) \
> + { .addr = _reg(idx) }
> +
> /*
> * Convenience macro for adding 64-bit registers.
> *
> @@ -669,6 +672,7 @@ static const struct drm_i915_reg_descriptor gen9_blt_regs[] = {
> REG64_IDX(RING_TIMESTAMP, BSD_RING_BASE),
> REG32(BCS_SWCTRL),
> REG64_IDX(RING_TIMESTAMP, BLT_RING_BASE),
> + REG32_IDX(RING_CTX_TIMESTAMP, BLT_RING_BASE),
> REG64_IDX(BCS_GPR, 0),
> REG64_IDX(BCS_GPR, 1),
> REG64_IDX(BCS_GPR, 2),
> --
> 2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
