On Thu, 24 Jan 2013 16:50:11 +0100 Daniel Vetter <daniel.vetter at ffwll.ch> wrote: > Hi all, > > Whith Ben wrestling the gtt code and trying to finally wear us off the intel-gtt > fix I've figured I might as well drop my idea for how we could better organize > the pte writing/clearing. > > With these patches there's no a clean cut between the code which manages the > address spaces and the code which writes (global/pp) gtt ptes. Which should > nicely pave the way for cool things to happen, like real per-process address > spaces. > > Comments highly welcome. Patches 1, and 2 from my original RFC rebase on top of this pretty nicely. I'd like to keep those, as it completes ripping out the. Also, given what I know about the future, I still like the (unposted) RFC I was working on as I think it makes everything cleaner - but you weild the power, and I just want to get real work done. I'll post the rebased 2 patches to this series in a few minutes. > > Cheers, Daniel > > Daniel Vetter (4): > drm/i915: vfuncs for gtt_clear_range/insert_entries > drm/i915: vfuncs for ppgtt > drm/i915: pte_encode is gen6+ > drm/i915: extract hw ppgtt setup/cleanup code > > drivers/gpu/drm/i915/i915_drv.h | 32 +++- > drivers/gpu/drm/i915/i915_gem_gtt.c | 310 ++++++++++++++++++++---------------- > 2 files changed, 200 insertions(+), 142 deletions(-) > -- Ben Widawsky, Intel Open Source Technology Center
