Hi all, Whith Ben wrestling the gtt code and trying to finally wear us off the intel-gtt fix I've figured I might as well drop my idea for how we could better organize the pte writing/clearing. With these patches there's no a clean cut between the code which manages the address spaces and the code which writes (global/pp) gtt ptes. Which should nicely pave the way for cool things to happen, like real per-process address spaces. Comments highly welcome. Cheers, Daniel Daniel Vetter (4): drm/i915: vfuncs for gtt_clear_range/insert_entries drm/i915: vfuncs for ppgtt drm/i915: pte_encode is gen6+ drm/i915: extract hw ppgtt setup/cleanup code drivers/gpu/drm/i915/i915_drv.h | 32 +++- drivers/gpu/drm/i915/i915_gem_gtt.c | 310 ++++++++++++++++++++---------------- 2 files changed, 200 insertions(+), 142 deletions(-) -- 1.7.11.7
