I have seen those failures in other patches as well, i.e before my patches landed. Best Regards, Lisovskiy Stanislav Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo ________________________________________ From: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> Sent: Saturday, May 23, 2020 2:18:44 AM To: Lisovskiy, Stanislav; Vudum, Lakshminarayana; intel-gfx@xxxxxxxxxxxxxxxxxxxxx Subject: Re: ✗ Fi.CI.IGT: failure for Consider DBuf bandwidth when calculating CDCLK (rev18) Quoting Chris Wilson (2020-05-22 23:00:10) > Quoting Lisovskiy, Stanislav (2020-05-21 10:35:42) > > Seems to be unrelated issue. There seems to be some list corruption happening in drm fb manipulation code. > > if those patches would be causing that (like some severe mem corruption)- it would happen much more broadly than single test and single platform. Moreover there is no direct connection to the changes. > > The fi-glk-dsi failure in module reload is a result of this series. > Somehow you have angered the i915 pm around snd_hda_intel. > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17733/fi-glk-dsi/igt@i915_pm_rpm@xxxxxxxxxxxxxxxxxx CI says "drm/i915: Adjust CDCLK accordingly to our DBuf bw needs" is the culprit. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
