Now that we have the declaration of trace_i915_reg_rw() in a separate header, start tracing intel_uncore_*_fw() mmio-accessors. Signed-off-by: Lucas De Marchi <lucas.demarchi@xxxxxxxxx> --- drivers/gpu/drm/i915/intel_uncore.h | 27 ++++++++++++++++++++++----- 1 file changed, 22 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_uncore.h b/drivers/gpu/drm/i915/intel_uncore.h index 8d3aa8b9acf9..0f95b32ff0f0 100644 --- a/drivers/gpu/drm/i915/intel_uncore.h +++ b/drivers/gpu/drm/i915/intel_uncore.h @@ -31,6 +31,7 @@ #include <linux/io-64-nonatomic-lo-hi.h> #include "i915_reg.h" +#include "i915_trace_reg_rw.h" struct drm_i915_private; struct intel_runtime_pm; @@ -348,8 +349,9 @@ intel_uncore_read64_2x32(struct intel_uncore *uncore, #undef __uncore_read #undef __uncore_write -/* These are untraced mmio-accessors that are only valid to be used inside - * critical sections, such as inside IRQ handlers, where forcewake is explicitly +/* + * These are mmio-accessors that are only valid to be used inside critical + * sections, such as inside IRQ handlers, where forcewake is explicitly * controlled. * * Think twice, and think again, before using these. @@ -374,9 +376,24 @@ intel_uncore_read64_2x32(struct intel_uncore *uncore, * therefore generally be serialised, by either the dev_priv->uncore.lock or * a more localised lock guarding all access to that bank of registers. */ -#define intel_uncore_read_fw(...) __raw_uncore_read32(__VA_ARGS__) -#define intel_uncore_write_fw(...) __raw_uncore_write32(__VA_ARGS__) -#define intel_uncore_write64_fw(...) __raw_uncore_write64(__VA_ARGS__) +#define intel_uncore_read_fw(uncore, reg) ({ \ + typeof(reg) reg___ = reg; \ + u32 val___ = __raw_uncore_read32(uncore, (reg___)); \ + trace_i915_reg_rw(false, reg___, val___, sizeof(val___), true); \ + val___; }) + +#define intel_uncore_write_fw(uncore, reg, val) ({ \ + typeof(reg) reg___ = reg; \ + typeof(val) val___ = val; \ + trace_i915_reg_rw(true, reg___, val___, sizeof(val___), true); \ + __raw_uncore_write32(uncore, reg___, val___); }) + +#define intel_uncore_write64_fw(uncore, reg, val) ({ \ + typeof(reg) reg___ = reg; \ + typeof(val) val___ = val; \ + trace_i915_reg_rw(true, reg___, val___, sizeof(val___), true); \ + __raw_uncore_write64(uncore, reg___, val___); }) + #define intel_uncore_posting_read_fw(...) ((void)intel_uncore_read_fw(__VA_ARGS__)) static inline void intel_uncore_rmw(struct intel_uncore *uncore, -- 2.26.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx