On Mon, May 18, 2020 at 02:14:15PM +0100, Chris Wilson wrote: > Quoting Ville Syrjala (2020-05-18 13:13:54) > > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > > > The current dbuf slice computation only happens when there are > > active pipes. If we are turning off all the pipes we just leave > > the dbuf slice mask at it's previous value, which may be something > > other that BIT(S1). If runtime PM will kick in it will however > > turn off everything but S1. Then on the next atomic commit (if > > the new dbuf slice mask matches the stale value we left behind) > > the code will not turn on the other slices we now need. This will > > lead to underruns as the planes are trying to use a dbuf slice > > that's not powered up. > > > > To work around let's just just explicitly set the dbuf slice mask > > to BIT(S1) when we are turning off all the pipes. Really the code > > should just calculate this stuff the same way regardless whether > > the pipes are on or off, but we're not quite there yet (need a > > bit more work on the dbuf state for that). > > > > v2: Let's not put the fix into dead code > > > > Cc: Stanislav Lisovskiy <stanislav.lisovskiy@xxxxxxxxx> > > Acked-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> #v1 > Acked-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > > Fixes: 3cf43cdc63fb ("drm/i915: Introduce proper dbuf state") > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > -Chris v2 seems to have done the trick. CI gave up on the reverts anyway so let's go with this one then. Pushed along with Chris's smatch fix. Apologies for the massive cockup. -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx