On Thu, May 14, 2020 at 06:21:43PM +0300, Stanislav Lisovskiy wrote: > We quite often need now to iterate only particular dbuf slices > in mask, whether they are active or related to particular crtc. > > v2: - Minor code refactoring > v3: - Use enum for max slices instead of macro > > Let's make our life a bit easier and use a macro for that. > > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@xxxxxxxxx> Reviewed-by: Manasi Navare <manasi.d.navare@xxxxxxxxx> Manasi > --- > drivers/gpu/drm/i915/display/intel_display.h | 7 +++++++ > drivers/gpu/drm/i915/display/intel_display_power.h | 1 + > 2 files changed, 8 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h > index efb4da205ea2..b7a6d56bac5f 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.h > +++ b/drivers/gpu/drm/i915/display/intel_display.h > @@ -187,6 +187,13 @@ enum plane_id { > for ((__p) = PLANE_PRIMARY; (__p) < I915_MAX_PLANES; (__p)++) \ > for_each_if((__crtc)->plane_ids_mask & BIT(__p)) > > +#define for_each_dbuf_slice_in_mask(__slice, __mask) \ > + for ((__slice) = DBUF_S1; (__slice) < I915_MAX_DBUF_SLICES; (__slice)++) \ > + for_each_if((BIT(__slice)) & (__mask)) > + > +#define for_each_dbuf_slice(__slice) \ > + for_each_dbuf_slice_in_mask(__slice, BIT(I915_MAX_DBUF_SLICES) - 1) > + > enum port { > PORT_NONE = -1, > > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h > index 6c917699293b..4d0d6f9dad26 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_power.h > +++ b/drivers/gpu/drm/i915/display/intel_display_power.h > @@ -314,6 +314,7 @@ intel_display_power_put_async(struct drm_i915_private *i915, > enum dbuf_slice { > DBUF_S1, > DBUF_S2, > + I915_MAX_DBUF_SLICES > }; > > #define with_intel_display_power(i915, domain, wf) \ > -- > 2.24.1.485.gad05a3d8e5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx