Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes: > These were used to set various timeouts for the reset procedure > (deciding when the engine was dead, and even if the reset itself was not > making forward progress). No longer used. > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_drv.h | 7 ------- > 1 file changed, 7 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 98dc8cdf2c38..631d31bc2313 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -625,13 +625,6 @@ i915_fence_timeout(const struct drm_i915_private *i915) > return i915_fence_context_timeout(i915, U64_MAX); > } > > -#define I915_RESET_TIMEOUT (10 * HZ) /* 10s */ > - > -#define I915_ENGINE_DEAD_TIMEOUT (4 * HZ) /* Seqno, head and subunits dead */ > -#define I915_SEQNO_DEAD_TIMEOUT (12 * HZ) /* Seqno dead with active head */ > - > -#define I915_ENGINE_WEDGED_TIMEOUT (60 * HZ) /* Reset but no recovery? */ > - > /* Amount of SAGV/QGV points, BSpec precisely defines this */ > #define I915_NUM_QGV_POINTS 8 > Indeed. Reviewed-by: Maciej Patelczyk <maciej.patelczyk@xxxxxxxxx> -MaciejP. _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
