For Gen11+ platforms BSpec suggests disabling specific
QGV points separately, depending on bandwidth limitations
and current display configuration. Thus it required adding
a new PCode request for disabling QGV points and some
refactoring of already existing SAGV code.
Also had to refactor intel_can_enable_sagv function,
as current seems to be outdated and using skl specific
workarounds, also not following BSpec for Gen11+.
v25: Rebased patch series as part was merged already
v26: Had to resend the whole series as one more mid patch was added
v27: Patches 2,3,7 were pushed, have to resend the series to prevent
build failure.
v28: PCode patch was merged, one patch was added, sent new series.
Stanislav Lisovskiy (6):
drm/i915: Introduce skl_plane_wm_level accessor.
drm/i915: Extract skl SAGV checking
drm/i915: Make active_pipes check skl specific
drm/i915: Add TGL+ SAGV support
drm/i915: Restrict qgv points which don't have enough bandwidth.
drm/i915: Enable SAGV support for Gen12
drivers/gpu/drm/i915/display/intel_bw.c | 137 +++++++++---
drivers/gpu/drm/i915/display/intel_bw.h | 9 +
drivers/gpu/drm/i915/display/intel_display.c | 8 +-
.../drm/i915/display/intel_display_types.h | 5 +
drivers/gpu/drm/i915/intel_pm.c | 202 +++++++++++++++---
drivers/gpu/drm/i915/intel_pm.h | 5 +-
6 files changed, 302 insertions(+), 64 deletions(-)
--
2.24.1.485.gad05a3d8e5
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