== Series Details == Series: Consider DBuf bandwidth when calculating CDCLK (rev10) URL : https://patchwork.freedesktop.org/series/74739/ State : warning == Summary == $ dim checkpatch origin/drm-tip f95bf937bce0 drm/i915: Decouple cdclk calculation from modeset checks 4dca6193f621 drm/i915: Extract cdclk requirements checking to separate function c570057695f2 drm/i915: Check plane configuration properly -:31: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Stanislav Lisovskiy <stanislav.lisovskiY@xxxxxxxxx>' total: 0 errors, 1 warnings, 0 checks, 14 lines checked bef12142b2dd drm/i915: Plane configuration affects CDCLK in Gen11+ -:22: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Stanislav Lisovskiy <stanislav.lisovskiY@xxxxxxxxx>' total: 0 errors, 1 warnings, 0 checks, 8 lines checked 309f231f6098 drm/i915: Introduce for_each_dbuf_slice_in_mask macro -:24: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__slice' - possible side-effects? #24: FILE: drivers/gpu/drm/i915/display/intel_display.h:190: +#define for_each_dbuf_slice_in_mask(__slice, __mask) \ + for ((__slice) = DBUF_S1; (__slice) < I915_MAX_DBUF_SLICES; (__slice)++) \ + for_each_if((BIT(__slice)) & (__mask)) total: 0 errors, 0 warnings, 1 checks, 20 lines checked ce163ad5cb90 drm/i915: Adjust CDCLK accordingly to our DBuf bw needs 120f117da5c4 drm/i915: Remove unneeded hack now for CDCLK _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
